tree:
https://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/fedora.git f32
head: c34b5926fefd7940f0420b6916c4454ff1a5b071
commit: 6b2ec5ddfcafbe21b594532881beb0da3095c6e6 [36/42] PCI: Add MCFG quirks for Tegra194
host controllers
config: arm64-randconfig-r035-20201209 (attached as .config)
compiler: clang version 12.0.0 (
https://github.com/llvm/llvm-project
5ff35356f1af2bb92785b38c657463924d9ec386)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
#
https://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/fedora.git/commit...
git remote add jwboyer-fedora
https://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/fedora.git
git fetch --no-tags jwboyer-fedora f32
git checkout 6b2ec5ddfcafbe21b594532881beb0da3095c6e6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
> drivers/pci/controller/dwc/pcie-tegra194.c:255:27: warning:
unused variable 'pcie_gen_freq' [-Wunused-const-variable]
static const
unsigned int pcie_gen_freq[] = {
^
drivers/pci/controller/dwc/pcie-tegra194.c:262:18: warning: unused variable
'event_cntr_ctrl_offset' [-Wunused-const-variable]
static const u32 event_cntr_ctrl_offset[] = {
^
drivers/pci/controller/dwc/pcie-tegra194.c:271:18: warning: unused variable
'event_cntr_data_offset' [-Wunused-const-variable]
static const u32 event_cntr_data_offset[] = {
^
3 warnings generated.
vim +/pcie_gen_freq +255 drivers/pci/controller/dwc/pcie-tegra194.c
c57247f940e8ea Vidya Sagar 2020-03-03 254
56e15a238d9278 Vidya Sagar 2019-08-13 @255 static const unsigned int pcie_gen_freq[] = {
56e15a238d9278 Vidya Sagar 2019-08-13 256 GEN1_CORE_CLK_FREQ,
56e15a238d9278 Vidya Sagar 2019-08-13 257 GEN2_CORE_CLK_FREQ,
56e15a238d9278 Vidya Sagar 2019-08-13 258 GEN3_CORE_CLK_FREQ,
56e15a238d9278 Vidya Sagar 2019-08-13 259 GEN4_CORE_CLK_FREQ
56e15a238d9278 Vidya Sagar 2019-08-13 260 };
56e15a238d9278 Vidya Sagar 2019-08-13 261
:::::: The code at line 255 was first introduced by commit
:::::: 56e15a238d92788a2d09e0c5c26a5de1b3156931 PCI: tegra: Add Tegra194 PCIe support
:::::: TO: Vidya Sagar <vidyas(a)nvidia.com>
:::::: CC: Lorenzo Pieralisi <lorenzo.pieralisi(a)arm.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org