tree: https://github.com/omap-audio/linux-audio peter/ti-linux-5.4.y/wip head: 552379986a161b9c6450557b53c6f078584bc479 commit: 2f6af5d50e1c4788aa235ba647e0a3a74d7a8583 [5465/9999] PCI: cadence: Add MSI-X support to Endpoint driver config: mips-randconfig-r006-20200707 (attached as .config) compiler: mips64el-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 2f6af5d50e1c4788aa235ba647e0a3a74d7a8583 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): drivers/pci/controller/cadence/pcie-cadence-ep.c: In function 'cdns_pcie_ep_send_msix_irq': 387 | u32 tbl_offset, msg_data, reg, vec_ctrl; | ^~~~~~~~ In file included from drivers/pci/controller/cadence/pcie-cadence-ep.c:13: At top level: drivers/pci/controller/cadence/pcie-cadence.h:501:22: warning: 'cdns_pci_map_bus' defined but not used [-Wunused-function] 501 | static void __iomem *cdns_pci_map_bus(struct pci_bus *bus, unsigned int devfn, | ^~~~~~~~~~~~~~~~ vim +/vec_ctrl +387 drivers/pci/controller/cadence/pcie-cadence-ep.c 382 383 static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, 384 u16 interrupt_num) 385 { 386 u32 cap = CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET; 388 struct cdns_pcie *pcie = &ep->pcie; 389 struct pci_epf_msix_tbl *msix_tbl; 390 struct pci_epf_bar *epf_bar; 391 struct cdns_pcie_epf *epf; 392 u64 pci_addr_mask = 0xff; 393 u64 msg_addr; 394 u16 flags; 395 u8 bir; 396 397 /* Check whether the MSI-X feature has been enabled by the PCI host. */ 398 flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSIX_FLAGS); 399 if (!(flags & PCI_MSIX_FLAGS_ENABLE)) 400 return -EINVAL; 401 402 reg = cap + PCI_MSIX_TABLE; 403 tbl_offset = cdns_pcie_ep_fn_readl(pcie, fn, reg); 404 bir = tbl_offset & PCI_MSIX_TABLE_BIR; 405 tbl_offset &= PCI_MSIX_TABLE_OFFSET; 406 407 epf = &ep->epf[fn]; 408 epf_bar = epf->epf_bar[bir]; 409 msix_tbl = epf_bar->addr; 410 msix_tbl = (struct pci_epf_msix_tbl *)((char *)msix_tbl + tbl_offset); 411 412 msg_addr = msix_tbl[(interrupt_num - 1)].msg_addr; 413 msg_data = msix_tbl[(interrupt_num - 1)].msg_data; 414 vec_ctrl = msix_tbl[(interrupt_num - 1)].vector_ctrl; 415 416 /* Set the outbound region if needed. */ 417 if (unlikely(ep->irq_pci_addr != (msg_addr & ~pci_addr_mask) || 418 ep->irq_pci_fn != fn)) { 419 /* First region was reserved for IRQ writes. */ 420 cdns_pcie_set_outbound_region(pcie, fn, 0, 421 false, 422 ep->irq_phys_addr, 423 msg_addr & ~pci_addr_mask, 424 pci_addr_mask + 1); 425 ep->irq_pci_addr = (msg_addr & ~pci_addr_mask); 426 ep->irq_pci_fn = fn; 427 } 428 writel(msg_data, ep->irq_cpu_addr + (msg_addr & pci_addr_mask)); 429 430 return 0; 431 } 432 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org