tree: git://git.armlinux.org.uk/~rmk/linux-arm.git clearfog
head: 60358028cb7ae864f9ea84eac86804c92f623951
commit: ba8248ab8ce8c1c3e68d176e608490205d0ee5d0 [9/10] mvebu/clearfog pcie updates
reproduce:
# apt-get install sparse
# sparse version: v0.6.1-174-g094d5a94-dirty
git checkout ba8248ab8ce8c1c3e68d176e608490205d0ee5d0
make ARCH=x86_64 allmodconfig
make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp(a)intel.com>
sparse warnings: (new ones prefixed by >>)
> drivers/pci/pci-bridge-emul.c:278:33: sparse: sparse: incorrect
type in assignment (different base types) @@ expected restricted __le16 [usertype]
bridgectrl @@ got e] bridgectrl @@
drivers/pci/pci-bridge-emul.c:278:33:
sparse: expected restricted __le16 [usertype] bridgectrl
drivers/pci/pci-bridge-emul.c:278:33: sparse: got int
vim +278 drivers/pci/pci-bridge-emul.c
263
264 /*
265 * Initialize a pci_bridge_emul structure to represent a fake PCI
266 * bridge configuration space. The caller needs to have initialized
267 * the PCI configuration space with whatever values make sense
268 * (typically at least vendor, device, revision), the ->ops pointer,
269 * and optionally ->data and ->has_pcie.
270 */
271 int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
272 unsigned int flags)
273 {
274 bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16);
275 bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
276 bridge->conf.cache_line_size = 0x10;
277 bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST);
278 bridge->conf.bridgectrl = PCI_BRIDGE_CTL_SERR;
279 bridge->pci_regs_behavior = kmemdup(pci_regs_behavior,
280 sizeof(pci_regs_behavior),
281 GFP_KERNEL);
282 if (!bridge->pci_regs_behavior)
283 return -ENOMEM;
284
285 if (bridge->has_pcie) {
286 bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
287 bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
288 /* Set PCIe v2, root port, slot support */
289 bridge->pcie_conf.cap =
290 cpu_to_le16(PCI_EXP_TYPE_ROOT_PORT << 4 | 2 |
291 PCI_EXP_FLAGS_SLOT);
292 bridge->pcie_cap_regs_behavior =
293 kmemdup(pcie_cap_regs_behavior,
294 sizeof(pcie_cap_regs_behavior),
295 GFP_KERNEL);
296 if (!bridge->pcie_cap_regs_behavior) {
297 kfree(bridge->pci_regs_behavior);
298 return -ENOMEM;
299 }
300 }
301
302 if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
303 bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
304 bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
305 }
306
307 return 0;
308 }
309
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org