[hch-misc:dma_alloc_pages 28/30] drivers/crypto/ccp/tee-dev.c:70:10: error: implicit declaration of function 'ioread32'
10:19 a.m.
tree: git://git.infradead.org/users/hch/misc.git dma_alloc_pages
head: 43a18af742023face57c43633bca9b5f1aa21c3b
commit: 84a45a398f32ef52e3cbe97ea88822c96b4c538a [28/30] dmapool: add dma_alloc_pages
support
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
git checkout 84a45a398f32ef52e3cbe97ea88822c96b4c538a
# save the attached .config to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
drivers/crypto/ccp/tee-dev.c: In function 'tee_wait_cmd_poll':
> drivers/crypto/ccp/tee-dev.c:70:10: error: implicit declaration
of function 'ioread32' [-Werror=implicit-function-declaration]
70 |
*reg = ioread32(tee->io_regs + tee->vdata->cmdresp_reg);
| ^~~~~~~~
drivers/crypto/ccp/tee-dev.c: In function 'tee_init_ring':
> drivers/crypto/ccp/tee-dev.c:137:2: error: implicit declaration
of function 'iowrite32' [-Werror=implicit-function-declaration]
137 |
iowrite32(lower_32_bits(cmd_buffer),
| ^~~~~~~~~
cc1: some warnings being treated as errors
git remote add hch-misc git://git.infradead.org/users/hch/misc.git
git fetch --no-tags hch-misc dma_alloc_pages
git checkout 84a45a398f32ef52e3cbe97ea88822c96b4c538a
vim +/ioread32 +70 drivers/crypto/ccp/tee-dev.c
33960acccfbd7f Rijo Thomas 2019-12-04 62
33960acccfbd7f Rijo Thomas 2019-12-04 63 static int tee_wait_cmd_poll(struct
psp_tee_device *tee, unsigned int timeout,
33960acccfbd7f Rijo Thomas 2019-12-04 64 unsigned int *reg)
33960acccfbd7f Rijo Thomas 2019-12-04 65 {
33960acccfbd7f Rijo Thomas 2019-12-04 66 /* ~10ms sleep per loop => nloop = timeout
* 100 */
33960acccfbd7f Rijo Thomas 2019-12-04 67 int nloop = timeout * 100;
33960acccfbd7f Rijo Thomas 2019-12-04 68
33960acccfbd7f Rijo Thomas 2019-12-04 69 while (--nloop) {
33960acccfbd7f Rijo Thomas 2019-12-04 @70 *reg = ioread32(tee->io_regs +
tee->vdata->cmdresp_reg);
33960acccfbd7f Rijo Thomas 2019-12-04 71 if (*reg & PSP_CMDRESP_RESP)
33960acccfbd7f Rijo Thomas 2019-12-04 72 return 0;
33960acccfbd7f Rijo Thomas 2019-12-04 73
33960acccfbd7f Rijo Thomas 2019-12-04 74 usleep_range(10000, 10100);
33960acccfbd7f Rijo Thomas 2019-12-04 75 }
33960acccfbd7f Rijo Thomas 2019-12-04 76
33960acccfbd7f Rijo Thomas 2019-12-04 77 dev_err(tee->dev, "tee: command timed
out, disabling PSP\n");
33960acccfbd7f Rijo Thomas 2019-12-04 78 psp_dead = true;
33960acccfbd7f Rijo Thomas 2019-12-04 79
33960acccfbd7f Rijo Thomas 2019-12-04 80 return -ETIMEDOUT;
33960acccfbd7f Rijo Thomas 2019-12-04 81 }
33960acccfbd7f Rijo Thomas 2019-12-04 82
33960acccfbd7f Rijo Thomas 2019-12-04 83 static
33960acccfbd7f Rijo Thomas 2019-12-04 84 struct tee_init_ring_cmd
*tee_alloc_cmd_buffer(struct psp_tee_device *tee)
33960acccfbd7f Rijo Thomas 2019-12-04 85 {
33960acccfbd7f Rijo Thomas 2019-12-04 86 struct tee_init_ring_cmd *cmd;
33960acccfbd7f Rijo Thomas 2019-12-04 87
33960acccfbd7f Rijo Thomas 2019-12-04 88 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
33960acccfbd7f Rijo Thomas 2019-12-04 89 if (!cmd)
33960acccfbd7f Rijo Thomas 2019-12-04 90 return NULL;
33960acccfbd7f Rijo Thomas 2019-12-04 91
33960acccfbd7f Rijo Thomas 2019-12-04 92 cmd->hi_addr =
upper_32_bits(tee->rb_mgr.ring_pa);
33960acccfbd7f Rijo Thomas 2019-12-04 93 cmd->low_addr =
lower_32_bits(tee->rb_mgr.ring_pa);
33960acccfbd7f Rijo Thomas 2019-12-04 94 cmd->size = tee->rb_mgr.ring_size;
33960acccfbd7f Rijo Thomas 2019-12-04 95
33960acccfbd7f Rijo Thomas 2019-12-04 96 dev_dbg(tee->dev, "tee: ring address:
high = 0x%x low = 0x%x size = %u\n",
33960acccfbd7f Rijo Thomas 2019-12-04 97 cmd->hi_addr, cmd->low_addr,
cmd->size);
33960acccfbd7f Rijo Thomas 2019-12-04 98
33960acccfbd7f Rijo Thomas 2019-12-04 99 return cmd;
33960acccfbd7f Rijo Thomas 2019-12-04 100 }
33960acccfbd7f Rijo Thomas 2019-12-04 101
33960acccfbd7f Rijo Thomas 2019-12-04 102 static inline void tee_free_cmd_buffer(struct
tee_init_ring_cmd *cmd)
33960acccfbd7f Rijo Thomas 2019-12-04 103 {
33960acccfbd7f Rijo Thomas 2019-12-04 104 kfree(cmd);
33960acccfbd7f Rijo Thomas 2019-12-04 105 }
33960acccfbd7f Rijo Thomas 2019-12-04 106
33960acccfbd7f Rijo Thomas 2019-12-04 107 static int tee_init_ring(struct psp_tee_device
*tee)
33960acccfbd7f Rijo Thomas 2019-12-04 108 {
33960acccfbd7f Rijo Thomas 2019-12-04 109 int ring_size = MAX_RING_BUFFER_ENTRIES *
sizeof(struct tee_ring_cmd);
33960acccfbd7f Rijo Thomas 2019-12-04 110 struct tee_init_ring_cmd *cmd;
33960acccfbd7f Rijo Thomas 2019-12-04 111 phys_addr_t cmd_buffer;
33960acccfbd7f Rijo Thomas 2019-12-04 112 unsigned int reg;
33960acccfbd7f Rijo Thomas 2019-12-04 113 int ret;
33960acccfbd7f Rijo Thomas 2019-12-04 114
33960acccfbd7f Rijo Thomas 2019-12-04 115 BUILD_BUG_ON(sizeof(struct tee_ring_cmd) !=
1024);
33960acccfbd7f Rijo Thomas 2019-12-04 116
33960acccfbd7f Rijo Thomas 2019-12-04 117 ret = tee_alloc_ring(tee, ring_size);
33960acccfbd7f Rijo Thomas 2019-12-04 118 if (ret) {
33960acccfbd7f Rijo Thomas 2019-12-04 119 dev_err(tee->dev, "tee: ring
allocation failed %d\n", ret);
33960acccfbd7f Rijo Thomas 2019-12-04 120 return ret;
33960acccfbd7f Rijo Thomas 2019-12-04 121 }
33960acccfbd7f Rijo Thomas 2019-12-04 122
33960acccfbd7f Rijo Thomas 2019-12-04 123 tee->rb_mgr.wptr = 0;
33960acccfbd7f Rijo Thomas 2019-12-04 124
33960acccfbd7f Rijo Thomas 2019-12-04 125 cmd = tee_alloc_cmd_buffer(tee);
33960acccfbd7f Rijo Thomas 2019-12-04 126 if (!cmd) {
33960acccfbd7f Rijo Thomas 2019-12-04 127 tee_free_ring(tee);
33960acccfbd7f Rijo Thomas 2019-12-04 128 return -ENOMEM;
33960acccfbd7f Rijo Thomas 2019-12-04 129 }
33960acccfbd7f Rijo Thomas 2019-12-04 130
33960acccfbd7f Rijo Thomas 2019-12-04 131 cmd_buffer = __psp_pa((void *)cmd);
33960acccfbd7f Rijo Thomas 2019-12-04 132
33960acccfbd7f Rijo Thomas 2019-12-04 133 /* Send command buffer details to Trusted OS
by writing to
33960acccfbd7f Rijo Thomas 2019-12-04 134 * CPU-PSP message registers
33960acccfbd7f Rijo Thomas 2019-12-04 135 */
33960acccfbd7f Rijo Thomas 2019-12-04 136
33960acccfbd7f Rijo Thomas 2019-12-04 @137 iowrite32(lower_32_bits(cmd_buffer),
33960acccfbd7f Rijo Thomas 2019-12-04 138 tee->io_regs +
tee->vdata->cmdbuff_addr_lo_reg);
33960acccfbd7f Rijo Thomas 2019-12-04 139 iowrite32(upper_32_bits(cmd_buffer),
33960acccfbd7f Rijo Thomas 2019-12-04 140 tee->io_regs +
tee->vdata->cmdbuff_addr_hi_reg);
33960acccfbd7f Rijo Thomas 2019-12-04 141 iowrite32(TEE_RING_INIT_CMD,
33960acccfbd7f Rijo Thomas 2019-12-04 142 tee->io_regs +
tee->vdata->cmdresp_reg);
33960acccfbd7f Rijo Thomas 2019-12-04 143
33960acccfbd7f Rijo Thomas 2019-12-04 144 ret = tee_wait_cmd_poll(tee,
TEE_DEFAULT_TIMEOUT, ®);
33960acccfbd7f Rijo Thomas 2019-12-04 145 if (ret) {
33960acccfbd7f Rijo Thomas 2019-12-04 146 dev_err(tee->dev, "tee: ring init
command timed out\n");
33960acccfbd7f Rijo Thomas 2019-12-04 147 tee_free_ring(tee);
33960acccfbd7f Rijo Thomas 2019-12-04 148 goto free_buf;
33960acccfbd7f Rijo Thomas 2019-12-04 149 }
33960acccfbd7f Rijo Thomas 2019-12-04 150
33960acccfbd7f Rijo Thomas 2019-12-04 151 if (reg & PSP_CMDRESP_ERR_MASK) {
33960acccfbd7f Rijo Thomas 2019-12-04 152 dev_err(tee->dev, "tee: ring init
command failed (%#010x)\n",
33960acccfbd7f Rijo Thomas 2019-12-04 153 reg & PSP_CMDRESP_ERR_MASK);
33960acccfbd7f Rijo Thomas 2019-12-04 154 tee_free_ring(tee);
33960acccfbd7f Rijo Thomas 2019-12-04 155 ret = -EIO;
33960acccfbd7f Rijo Thomas 2019-12-04 156 }
33960acccfbd7f Rijo Thomas 2019-12-04 157
33960acccfbd7f Rijo Thomas 2019-12-04 158 free_buf:
33960acccfbd7f Rijo Thomas 2019-12-04 159 tee_free_cmd_buffer(cmd);
33960acccfbd7f Rijo Thomas 2019-12-04 160
33960acccfbd7f Rijo Thomas 2019-12-04 161 return ret;
33960acccfbd7f Rijo Thomas 2019-12-04 162 }
33960acccfbd7f Rijo Thomas 2019-12-04 163
:::::: The code at line 70 was first introduced by commit
:::::: 33960acccfbd7f24d443cb3d0312ac28abe62bae crypto: ccp - add TEE support for Raven
Ridge
:::::: TO: Rijo Thomas <Rijo-john.Thomas(a)amd.com>
:::::: CC: Herbert Xu <herbert(a)gondor.apana.org.au>
---
0-DAY CI Kernel Test Service, Intel Corporation
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