Hi Mauro,
First bad commit (maybe != root cause):
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: 605cbf3d5f20470ec303b79feda3202935f4a142
commit: 1747938a37d1dfa9faa397507f88627158b3d806 [1967/2546] staging: spmi:
hisi-spmi-controller: add it to the building system
config: h8300-randconfig-s032-20200820 (attached as .config)
compiler: h8300-linux-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-191-g10164920-dirty
git checkout 1747938a37d1dfa9faa397507f88627158b3d806
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=h8300
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
sparse warnings: (new ones prefixed by >>)
> drivers/staging/hikey9xx/hisi-spmi-controller.c:183:24: sparse:
sparse: cast to restricted __be32
> drivers/staging/hikey9xx/hisi-spmi-controller.c:257:25: sparse: sparse: cast from
restricted __be32
drivers/staging/hikey9xx/hisi-spmi-controller.c: note: in
included file (through include/linux/io.h):
arch/h8300/include/asm/io.h:26:18: sparse: sparse: cast removes address space
'__iomem' of expression
arch/h8300/include/asm/io.h:26:18: sparse: sparse: cast removes address space
'__iomem' of expression
arch/h8300/include/asm/io.h:44:11: sparse: sparse: cast removes address space
'__iomem' of expression
arch/h8300/include/asm/io.h:26:18: sparse: sparse: cast removes address space
'__iomem' of expression
arch/h8300/include/asm/io.h:26:18: sparse: sparse: cast removes address space
'__iomem' of expression
arch/h8300/include/asm/io.h:44:11: sparse: sparse: cast removes address space
'__iomem' of expression
arch/h8300/include/asm/io.h:44:11: sparse: sparse: cast removes address space
'__iomem' of expression
#
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commi...
git remote add linux-next
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
git fetch --no-tags linux-next master
git checkout 1747938a37d1dfa9faa397507f88627158b3d806
vim +183 drivers/staging/hikey9xx/hisi-spmi-controller.c
70f59c90c8199e8 Mayulong 2020-08-17 134
70f59c90c8199e8 Mayulong 2020-08-17 135 static int spmi_read_cmd(struct
spmi_controller *ctrl,
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 136 u8 opc, u8 sid, u16 addr, u8
*__buf, size_t bc)
70f59c90c8199e8 Mayulong 2020-08-17 137 {
70f59c90c8199e8 Mayulong 2020-08-17 138 struct spmi_controller_dev
*spmi_controller = dev_get_drvdata(&ctrl->dev);
70f59c90c8199e8 Mayulong 2020-08-17 139 unsigned long flags;
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 140 u8 *buf = __buf;
70f59c90c8199e8 Mayulong 2020-08-17 141 u32 cmd, data;
70f59c90c8199e8 Mayulong 2020-08-17 142 int rc;
70f59c90c8199e8 Mayulong 2020-08-17 143 u32 chnl_ofst =
SPMI_CHANNEL_OFFSET * spmi_controller->channel;
70f59c90c8199e8 Mayulong 2020-08-17 144 u8 op_code, i;
70f59c90c8199e8 Mayulong 2020-08-17 145
70f59c90c8199e8 Mayulong 2020-08-17 146 if (bc >
SPMI_CONTROLLER_MAX_TRANS_BYTES) {
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 147 dev_err(&ctrl->dev,
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 148 "spmi_controller supports
1..%d bytes per trans, but:%ld requested",
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 149 SPMI_CONTROLLER_MAX_TRANS_BYTES,
bc);
70f59c90c8199e8 Mayulong 2020-08-17 150 return -EINVAL;
70f59c90c8199e8 Mayulong 2020-08-17 151 }
70f59c90c8199e8 Mayulong 2020-08-17 152
70f59c90c8199e8 Mayulong 2020-08-17 153 /* Check the opcode */
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 154 if (opc == SPMI_CMD_READ) {
70f59c90c8199e8 Mayulong 2020-08-17 155 op_code = SPMI_CMD_REG_READ;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 156 } else if (opc ==
SPMI_CMD_EXT_READ) {
70f59c90c8199e8 Mayulong 2020-08-17 157 op_code = SPMI_CMD_EXT_REG_READ;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 158 } else if (opc ==
SPMI_CMD_EXT_READL) {
70f59c90c8199e8 Mayulong 2020-08-17 159 op_code =
SPMI_CMD_EXT_REG_READ_L;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 160 } else {
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 161 dev_err(&ctrl->dev,
"invalid read cmd 0x%x", opc);
70f59c90c8199e8 Mayulong 2020-08-17 162 return -EINVAL;
70f59c90c8199e8 Mayulong 2020-08-17 163 }
70f59c90c8199e8 Mayulong 2020-08-17 164
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 165 cmd = SPMI_APB_SPMI_CMD_EN |
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 166 (op_code <<
SPMI_APB_SPMI_CMD_TYPE_OFFSET) |
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 167 ((bc - 1) <<
SPMI_APB_SPMI_CMD_LENGTH_OFFSET) |
70f59c90c8199e8 Mayulong 2020-08-17 168 ((sid & 0xf) <<
SPMI_APB_SPMI_CMD_SLAVEID_OFFSET) | /* slvid */
70f59c90c8199e8 Mayulong 2020-08-17 169 ((addr & 0xffff)
<< SPMI_APB_SPMI_CMD_ADDR_OFFSET); /* slave_addr */
70f59c90c8199e8 Mayulong 2020-08-17 170
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 171
spin_lock_irqsave(&spmi_controller->lock, flags);
70f59c90c8199e8 Mayulong 2020-08-17 172
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 173 writel(cmd,
spmi_controller->base + chnl_ofst + SPMI_APB_SPMI_CMD_BASE_ADDR);
70f59c90c8199e8 Mayulong 2020-08-17 174
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 175 rc =
spmi_controller_wait_for_done(&ctrl->dev, spmi_controller,
8788a30c12c7884 Mauro Carvalho Chehab 2020-08-17 176 spmi_controller->base,
sid, addr);
70f59c90c8199e8 Mayulong 2020-08-17 177 if (rc)
70f59c90c8199e8 Mayulong 2020-08-17 178 goto done;
70f59c90c8199e8 Mayulong 2020-08-17 179
70f59c90c8199e8 Mayulong 2020-08-17 180 i = 0;
70f59c90c8199e8 Mayulong 2020-08-17 181 do {
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 182 data =
readl(spmi_controller->base + chnl_ofst + SPMI_SLAVE_OFFSET * sid +
SPMI_APB_SPMI_RDATA0_BASE_ADDR + i * SPMI_PER_DATAREG_BYTE);
8788a30c12c7884 Mauro Carvalho Chehab 2020-08-17 @183 data =
be32_to_cpu((__be32)data);
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 184 if ((bc - i *
SPMI_PER_DATAREG_BYTE) >> 2) {
70f59c90c8199e8 Mayulong 2020-08-17 185 memcpy(buf, &data,
sizeof(data));
70f59c90c8199e8 Mayulong 2020-08-17 186 buf += sizeof(data);
70f59c90c8199e8 Mayulong 2020-08-17 187 } else {
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 188 memcpy(buf, &data, bc %
SPMI_PER_DATAREG_BYTE);
70f59c90c8199e8 Mayulong 2020-08-17 189 buf += (bc %
SPMI_PER_DATAREG_BYTE);
70f59c90c8199e8 Mayulong 2020-08-17 190 }
70f59c90c8199e8 Mayulong 2020-08-17 191 i++;
70f59c90c8199e8 Mayulong 2020-08-17 192 } while (bc > i *
SPMI_PER_DATAREG_BYTE);
70f59c90c8199e8 Mayulong 2020-08-17 193
70f59c90c8199e8 Mayulong 2020-08-17 194 done:
70f59c90c8199e8 Mayulong 2020-08-17 195
spin_unlock_irqrestore(&spmi_controller->lock, flags);
70f59c90c8199e8 Mayulong 2020-08-17 196 if (rc)
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 197 dev_err(&ctrl->dev,
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 198 "spmi read wait timeout
op:0x%x sid:%d addr:0x%x bc:%ld\n",
70f59c90c8199e8 Mayulong 2020-08-17 199 opc, sid, addr, bc + 1);
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 200 else
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 201 dev_dbg(&ctrl->dev,
"%s: id:%d addr:0x%x, read value: %*ph\n",
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 202 __func__, sid, addr, (int)bc,
__buf);
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 203
70f59c90c8199e8 Mayulong 2020-08-17 204 return rc;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 205 }
70f59c90c8199e8 Mayulong 2020-08-17 206
70f59c90c8199e8 Mayulong 2020-08-17 207 static int spmi_write_cmd(struct
spmi_controller *ctrl,
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 208 u8 opc, u8 sid, u16 addr,
const u8 *__buf, size_t bc)
70f59c90c8199e8 Mayulong 2020-08-17 209 {
70f59c90c8199e8 Mayulong 2020-08-17 210 struct spmi_controller_dev
*spmi_controller = dev_get_drvdata(&ctrl->dev);
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 211 const u8 *buf = __buf;
70f59c90c8199e8 Mayulong 2020-08-17 212 unsigned long flags;
8788a30c12c7884 Mauro Carvalho Chehab 2020-08-17 213 u32 cmd, data;
70f59c90c8199e8 Mayulong 2020-08-17 214 int rc;
70f59c90c8199e8 Mayulong 2020-08-17 215 u32 chnl_ofst =
SPMI_CHANNEL_OFFSET * spmi_controller->channel;
70f59c90c8199e8 Mayulong 2020-08-17 216 u8 op_code, i;
70f59c90c8199e8 Mayulong 2020-08-17 217
70f59c90c8199e8 Mayulong 2020-08-17 218 if (bc >
SPMI_CONTROLLER_MAX_TRANS_BYTES) {
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 219 dev_err(&ctrl->dev,
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 220 "spmi_controller supports
1..%d bytes per trans, but:%ld requested",
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 221 SPMI_CONTROLLER_MAX_TRANS_BYTES,
bc);
70f59c90c8199e8 Mayulong 2020-08-17 222 return -EINVAL;
70f59c90c8199e8 Mayulong 2020-08-17 223 }
70f59c90c8199e8 Mayulong 2020-08-17 224
70f59c90c8199e8 Mayulong 2020-08-17 225 /* Check the opcode */
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 226 if (opc == SPMI_CMD_WRITE) {
70f59c90c8199e8 Mayulong 2020-08-17 227 op_code = SPMI_CMD_REG_WRITE;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 228 } else if (opc ==
SPMI_CMD_EXT_WRITE) {
70f59c90c8199e8 Mayulong 2020-08-17 229 op_code =
SPMI_CMD_EXT_REG_WRITE;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 230 } else if (opc ==
SPMI_CMD_EXT_WRITEL) {
70f59c90c8199e8 Mayulong 2020-08-17 231 op_code =
SPMI_CMD_EXT_REG_WRITE_L;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 232 } else {
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 233 dev_err(&ctrl->dev,
"invalid write cmd 0x%x", opc);
70f59c90c8199e8 Mayulong 2020-08-17 234 return -EINVAL;
70f59c90c8199e8 Mayulong 2020-08-17 235 }
70f59c90c8199e8 Mayulong 2020-08-17 236
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 237 cmd = SPMI_APB_SPMI_CMD_EN |
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 238 (op_code <<
SPMI_APB_SPMI_CMD_TYPE_OFFSET) |
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 239 ((bc - 1) <<
SPMI_APB_SPMI_CMD_LENGTH_OFFSET) |
70f59c90c8199e8 Mayulong 2020-08-17 240 ((sid & 0xf) <<
SPMI_APB_SPMI_CMD_SLAVEID_OFFSET) | /* slvid */
70f59c90c8199e8 Mayulong 2020-08-17 241 ((addr & 0xffff)
<< SPMI_APB_SPMI_CMD_ADDR_OFFSET); /* slave_addr */
70f59c90c8199e8 Mayulong 2020-08-17 242
70f59c90c8199e8 Mayulong 2020-08-17 243 /* Write data to FIFOs */
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 244
spin_lock_irqsave(&spmi_controller->lock, flags);
70f59c90c8199e8 Mayulong 2020-08-17 245
70f59c90c8199e8 Mayulong 2020-08-17 246 i = 0;
70f59c90c8199e8 Mayulong 2020-08-17 247 do {
8788a30c12c7884 Mauro Carvalho Chehab 2020-08-17 248 data = 0;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 249 if ((bc - i *
SPMI_PER_DATAREG_BYTE) >> 2) {
70f59c90c8199e8 Mayulong 2020-08-17 250 memcpy(&data, buf,
sizeof(data));
70f59c90c8199e8 Mayulong 2020-08-17 251 buf += sizeof(data);
70f59c90c8199e8 Mayulong 2020-08-17 252 } else {
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 253 memcpy(&data, buf, bc %
SPMI_PER_DATAREG_BYTE);
70f59c90c8199e8 Mayulong 2020-08-17 254 buf += (bc %
SPMI_PER_DATAREG_BYTE);
70f59c90c8199e8 Mayulong 2020-08-17 255 }
70f59c90c8199e8 Mayulong 2020-08-17 256
8788a30c12c7884 Mauro Carvalho Chehab 2020-08-17 @257 writel((u32)cpu_to_be32(data),
8788a30c12c7884 Mauro Carvalho Chehab 2020-08-17 258 spmi_controller->base +
chnl_ofst + SPMI_APB_SPMI_WDATA0_BASE_ADDR + SPMI_PER_DATAREG_BYTE * i);
70f59c90c8199e8 Mayulong 2020-08-17 259 i++;
70f59c90c8199e8 Mayulong 2020-08-17 260 } while (bc > i *
SPMI_PER_DATAREG_BYTE);
70f59c90c8199e8 Mayulong 2020-08-17 261
70f59c90c8199e8 Mayulong 2020-08-17 262 /* Start the transaction */
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 263 writel(cmd,
spmi_controller->base + chnl_ofst + SPMI_APB_SPMI_CMD_BASE_ADDR);
70f59c90c8199e8 Mayulong 2020-08-17 264
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 265 rc =
spmi_controller_wait_for_done(&ctrl->dev, spmi_controller,
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 266 spmi_controller->base,
sid, addr);
70f59c90c8199e8 Mayulong 2020-08-17 267
spin_unlock_irqrestore(&spmi_controller->lock, flags);
70f59c90c8199e8 Mayulong 2020-08-17 268
70f59c90c8199e8 Mayulong 2020-08-17 269 if (rc)
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 270 dev_err(&ctrl->dev,
"spmi write wait timeout op:0x%x sid:%d addr:0x%x bc:%ld\n",
70f59c90c8199e8 Mayulong 2020-08-17 271 opc, sid, addr, bc);
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 272 else
4d914a8c480c312 Mauro Carvalho Chehab 2020-08-17 273 dev_dbg(&ctrl->dev,
"%s: id:%d addr:0x%x, wrote value: %*ph\n",
6af364501949d99 Mauro Carvalho Chehab 2020-08-17 274 __func__, sid, addr, (int)bc,
__buf);
70f59c90c8199e8 Mayulong 2020-08-17 275
70f59c90c8199e8 Mayulong 2020-08-17 276 return rc;
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 277 }
2ea3f6a03b155f4 Mauro Carvalho Chehab 2020-08-17 278
:::::: The code at line 183 was first introduced by commit
:::::: 8788a30c12c78846c153bea06125296111f53ece staging: spmi: hisi-spmi-controller: use
le32 macros where needed
:::::: TO: Mauro Carvalho Chehab <mchehab+huawei(a)kernel.org>
:::::: CC: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org