Hi Konrad, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on clk/clk-next] [also build test WARNING on v5.13-rc6 next-20210616] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Konrad-Dybcio/dt-bindings-clock-... base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next config: arc-allyesconfig (attached as .config) compiler: arceb-elf-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/202d9429a66404a6a013fa23e6833ec01... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Konrad-Dybcio/dt-bindings-clock-Add-support-for-MSM8992-4-MMCC/20210617-084241 git checkout 202d9429a66404a6a013fa23e6833ec018c0b0bc # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): 2324 | [JPEG0_CLK_SRC] = &jpeg0_clk_src.clkr, | ^ drivers/clk/qcom/mmcc-msm8994.c:2324:20: note: (near initialization for 'mmcc_msm8994_clocks[35]') drivers/clk/qcom/mmcc-msm8994.c:2400:19: warning: initialized field overwritten [-Woverride-init] 2400 | [ESC0_CLK_SRC] = &esc0_clk_src.clkr, | ^ drivers/clk/qcom/mmcc-msm8994.c:2400:19: note: (near initialization for 'mmcc_msm8994_clocks[18]') drivers/clk/qcom/mmcc-msm8994.c:2401:19: warning: initialized field overwritten [-Woverride-init] 2401 | [ESC1_CLK_SRC] = &esc1_clk_src.clkr, | ^ drivers/clk/qcom/mmcc-msm8994.c:2401:19: note: (near initialization for 'mmcc_msm8994_clocks[19]') drivers/clk/qcom/mmcc-msm8994.c:645:30: warning: 'ftbl_ocmemnoc_clk_src' defined but not used [-Wunused-const-variable=] 645 | static const struct freq_tbl ftbl_ocmemnoc_clk_src[] = { | ^~~~~~~~~~~~~~~~~~~~~ vim +2324 drivers/clk/qcom/mmcc-msm8994.c 2291 2292 static struct clk_regmap *mmcc_msm8994_clocks[] = { 2293 [MMPLL0_EARLY] = &mmpll0_early.clkr, 2294 [MMPLL0_PLL] = &mmpll0.clkr, 2295 [MMPLL1_EARLY] = &mmpll1_early.clkr, 2296 [MMPLL1_PLL] = &mmpll1.clkr, 2297 [MMPLL3_EARLY] = &mmpll3_early.clkr, 2298 [MMPLL3_PLL] = &mmpll3.clkr, 2299 [MMPLL4_EARLY] = &mmpll4_early.clkr, 2300 [MMPLL4_PLL] = &mmpll4.clkr, 2301 [MMPLL5_EARLY] = &mmpll5_early.clkr, 2302 [MMPLL5_PLL] = &mmpll5.clkr, 2303 [AHB_CLK_SRC] = &ahb_clk_src.clkr, 2304 [AXI_CLK_SRC] = &axi_clk_src.clkr, 2305 [CSI0_CLK_SRC] = &csi0_clk_src.clkr, 2306 [CSI1_CLK_SRC] = &csi1_clk_src.clkr, 2307 [CSI2_CLK_SRC] = &csi2_clk_src.clkr, 2308 [CSI3_CLK_SRC] = &csi3_clk_src.clkr, 2309 [VFE0_CLK_SRC] = &vfe0_clk_src.clkr, 2310 [VFE1_CLK_SRC] = &vfe1_clk_src.clkr, 2311 [CPP_CLK_SRC] = &cpp_clk_src.clkr, 2312 [JPEG0_CLK_SRC] = &jpeg0_clk_src.clkr, 2313 [JPEG1_CLK_SRC] = &jpeg1_clk_src.clkr, 2314 [JPEG2_CLK_SRC] = &jpeg2_clk_src.clkr, 2315 [CSI2PHYTIMER_CLK_SRC] = &csi2phytimer_clk_src.clkr, 2316 [FD_CORE_CLK_SRC] = &fd_core_clk_src.clkr, 2317 [MDP_CLK_SRC] = &mdp_clk_src.clkr, 2318 [PCLK0_CLK_SRC] = &pclk0_clk_src.clkr, 2319 [PCLK1_CLK_SRC] = &pclk1_clk_src.clkr, 2320 [OCMEMNOC_CLK_SRC] = &ocmemnoc_clk_src.clkr, 2321 [CCI_CLK_SRC] = &cci_clk_src.clkr, 2322 [MMSS_GP0_CLK_SRC] = &mmss_gp0_clk_src.clkr, 2323 [MMSS_GP1_CLK_SRC] = &mmss_gp1_clk_src.clkr, 2325 [JPEG_DMA_CLK_SRC] = &jpeg_dma_clk_src.clkr, 2326 [MCLK0_CLK_SRC] = &mclk0_clk_src.clkr, 2327 [MCLK1_CLK_SRC] = &mclk1_clk_src.clkr, 2328 [MCLK2_CLK_SRC] = &mclk2_clk_src.clkr, 2329 [MCLK3_CLK_SRC] = &mclk3_clk_src.clkr, 2330 [CSI0PHYTIMER_CLK_SRC] = &csi0phytimer_clk_src.clkr, 2331 [CSI1PHYTIMER_CLK_SRC] = &csi1phytimer_clk_src.clkr, 2332 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr, 2333 [BYTE1_CLK_SRC] = &byte1_clk_src.clkr, 2334 [ESC0_CLK_SRC] = &esc0_clk_src.clkr, 2335 [ESC1_CLK_SRC] = &esc1_clk_src.clkr, 2336 [MDSS_ESC0_CLK] = &mdss_esc0_clk.clkr, 2337 [MDSS_ESC1_CLK] = &mdss_esc1_clk.clkr, 2338 [EXTPCLK_CLK_SRC] = &extpclk_clk_src.clkr, 2339 [HDMI_CLK_SRC] = &hdmi_clk_src.clkr, 2340 [VSYNC_CLK_SRC] = &vsync_clk_src.clkr, 2341 [RBBMTIMER_CLK_SRC] = &rbbmtimer_clk_src.clkr, 2342 [CAMSS_AHB_CLK] = &camss_ahb_clk.clkr, 2343 [CAMSS_CCI_CCI_AHB_CLK] = &camss_cci_cci_ahb_clk.clkr, 2344 [CAMSS_CCI_CCI_CLK] = &camss_cci_cci_clk.clkr, 2345 [CAMSS_VFE_CPP_AHB_CLK] = &camss_vfe_cpp_ahb_clk.clkr, 2346 [CAMSS_VFE_CPP_AXI_CLK] = &camss_vfe_cpp_axi_clk.clkr, 2347 [CAMSS_VFE_CPP_CLK] = &camss_vfe_cpp_clk.clkr, 2348 [CAMSS_CSI0_AHB_CLK] = &camss_csi0_ahb_clk.clkr, 2349 [CAMSS_CSI0_CLK] = &camss_csi0_clk.clkr, 2350 [CAMSS_CSI0PHY_CLK] = &camss_csi0phy_clk.clkr, 2351 [CAMSS_CSI0PIX_CLK] = &camss_csi0pix_clk.clkr, 2352 [CAMSS_CSI0RDI_CLK] = &camss_csi0rdi_clk.clkr, 2353 [CAMSS_CSI1_AHB_CLK] = &camss_csi1_ahb_clk.clkr, 2354 [CAMSS_CSI1_CLK] = &camss_csi1_clk.clkr, 2355 [CAMSS_CSI1PHY_CLK] = &camss_csi1phy_clk.clkr, 2356 [CAMSS_CSI1PIX_CLK] = &camss_csi1pix_clk.clkr, 2357 [CAMSS_CSI1RDI_CLK] = &camss_csi1rdi_clk.clkr, 2358 [CAMSS_CSI2_AHB_CLK] = &camss_csi2_ahb_clk.clkr, 2359 [CAMSS_CSI2_CLK] = &camss_csi2_clk.clkr, 2360 [CAMSS_CSI2PHY_CLK] = &camss_csi2phy_clk.clkr, 2361 [CAMSS_CSI2PIX_CLK] = &camss_csi2pix_clk.clkr, 2362 [CAMSS_CSI2RDI_CLK] = &camss_csi2rdi_clk.clkr, 2363 [CAMSS_CSI3_AHB_CLK] = &camss_csi3_ahb_clk.clkr, 2364 [CAMSS_CSI3_CLK] = &camss_csi3_clk.clkr, 2365 [CAMSS_CSI3PHY_CLK] = &camss_csi3phy_clk.clkr, 2366 [CAMSS_CSI3PIX_CLK] = &camss_csi3pix_clk.clkr, 2367 [CAMSS_CSI3RDI_CLK] = &camss_csi3rdi_clk.clkr, 2368 [CAMSS_CSI_VFE0_CLK] = &camss_csi_vfe0_clk.clkr, 2369 [CAMSS_CSI_VFE1_CLK] = &camss_csi_vfe1_clk.clkr, 2370 [CAMSS_GP0_CLK] = &camss_gp0_clk.clkr, 2371 [CAMSS_GP1_CLK] = &camss_gp1_clk.clkr, 2372 [CAMSS_ISPIF_AHB_CLK] = &camss_ispif_ahb_clk.clkr, 2373 [CAMSS_JPEG_DMA_CLK] = &camss_jpeg_dma_clk.clkr, 2374 [CAMSS_JPEG_JPEG0_CLK] = &camss_jpeg_jpeg0_clk.clkr, 2375 [CAMSS_JPEG_JPEG1_CLK] = &camss_jpeg_jpeg1_clk.clkr, 2376 [CAMSS_JPEG_JPEG2_CLK] = &camss_jpeg_jpeg2_clk.clkr, 2377 [CAMSS_JPEG_JPEG_AHB_CLK] = &camss_jpeg_jpeg_ahb_clk.clkr, 2378 [CAMSS_JPEG_JPEG_AXI_CLK] = &camss_jpeg_jpeg_axi_clk.clkr, 2379 [CAMSS_MCLK0_CLK] = &camss_mclk0_clk.clkr, 2380 [CAMSS_MCLK1_CLK] = &camss_mclk1_clk.clkr, 2381 [CAMSS_MCLK2_CLK] = &camss_mclk2_clk.clkr, 2382 [CAMSS_MCLK3_CLK] = &camss_mclk3_clk.clkr, 2383 [CAMSS_MICRO_AHB_CLK] = &camss_micro_ahb_clk.clkr, 2384 [CAMSS_PHY0_CSI0PHYTIMER_CLK] = &camss_phy0_csi0phytimer_clk.clkr, 2385 [CAMSS_PHY1_CSI1PHYTIMER_CLK] = &camss_phy1_csi1phytimer_clk.clkr, 2386 [CAMSS_PHY2_CSI2PHYTIMER_CLK] = &camss_phy2_csi2phytimer_clk.clkr, 2387 [CAMSS_TOP_AHB_CLK] = &camss_top_ahb_clk.clkr, 2388 [CAMSS_VFE_VFE0_CLK] = &camss_vfe_vfe0_clk.clkr, 2389 [CAMSS_VFE_VFE1_CLK] = &camss_vfe_vfe1_clk.clkr, 2390 [CAMSS_VFE_VFE_AHB_CLK] = &camss_vfe_vfe_ahb_clk.clkr, 2391 [CAMSS_VFE_VFE_AXI_CLK] = &camss_vfe_vfe_axi_clk.clkr, 2392 [FD_AHB_CLK] = &fd_ahb_clk.clkr, 2393 [FD_AXI_CLK] = &fd_axi_clk.clkr, 2394 [FD_CORE_CLK] = &fd_core_clk.clkr, 2395 [FD_CORE_UAR_CLK] = &fd_core_uar_clk.clkr, 2396 [MDSS_AHB_CLK] = &mdss_ahb_clk.clkr, 2397 [MDSS_AXI_CLK] = &mdss_axi_clk.clkr, 2398 [MDSS_BYTE0_CLK] = &mdss_byte0_clk.clkr, 2399 [MDSS_BYTE1_CLK] = &mdss_byte1_clk.clkr, 2400 [ESC0_CLK_SRC] = &esc0_clk_src.clkr, 2401 [ESC1_CLK_SRC] = &esc1_clk_src.clkr, 2402 [MDSS_EXTPCLK_CLK] = &mdss_extpclk_clk.clkr, 2403 [MDSS_HDMI_AHB_CLK] = &mdss_hdmi_ahb_clk.clkr, 2404 [MDSS_HDMI_CLK] = &mdss_hdmi_clk.clkr, 2405 [MDSS_MDP_CLK] = &mdss_mdp_clk.clkr, 2406 [MDSS_PCLK0_CLK] = &mdss_pclk0_clk.clkr, 2407 [MDSS_PCLK1_CLK] = &mdss_pclk1_clk.clkr, 2408 [MDSS_VSYNC_CLK] = &mdss_vsync_clk.clkr, 2409 [MMSS_MISC_AHB_CLK] = &mmss_misc_ahb_clk.clkr, 2410 [MMSS_MMSSNOC_AXI_CLK] = &mmss_mmssnoc_axi_clk.clkr, 2411 [MMSS_S0_AXI_CLK] = &mmss_s0_axi_clk.clkr, 2412 [OCMEMCX_OCMEMNOC_CLK] = &ocmemcx_ocmemnoc_clk.clkr, 2413 [OXILI_GFX3D_CLK] = &oxili_gfx3d_clk.clkr, 2414 [OXILI_RBBMTIMER_CLK] = &oxili_rbbmtimer_clk.clkr, 2415 [OXILICX_AHB_CLK] = &oxilicx_ahb_clk.clkr, 2416 [VENUS0_AHB_CLK] = &venus0_ahb_clk.clkr, 2417 [VENUS0_AXI_CLK] = &venus0_axi_clk.clkr, 2418 [VENUS0_OCMEMNOC_CLK] = &venus0_ocmemnoc_clk.clkr, 2419 [VENUS0_VCODEC0_CLK] = &venus0_vcodec0_clk.clkr, 2420 [VENUS0_CORE0_VCODEC_CLK] = &venus0_core0_vcodec_clk.clkr, 2421 [VENUS0_CORE1_VCODEC_CLK] = &venus0_core1_vcodec_clk.clkr, 2422 [VENUS0_CORE2_VCODEC_CLK] = &venus0_core2_vcodec_clk.clkr, 2423 }; 2424 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org