Hi Andy, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 9317f948b0b188b8d2fded75957e6d42c460df1b commit: 48695a8096ab2edeeed1b9b6e359d21f13c50a70 [13004/13311] gpio: hisi: Do not require ACPI for COMPILE_TEST config: openrisc-randconfig-r032-20201216 (attached as .config) compiler: or1k-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commi... git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout 48695a8096ab2edeeed1b9b6e359d21f13c50a70 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=openrisc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): drivers/gpio/gpio-hisi.c: In function 'hisi_gpio_probe': 257 | void __iomem *dat, *set, *clr; | ^~~ 257 | void __iomem *dat, *set, *clr; | ^~~ 257 | void __iomem *dat, *set, *clr; | ^~~ vim +/clr +257 drivers/gpio/gpio-hisi.c 356b01a986a5550 Luo Jiaxing 2020-12-14 253 356b01a986a5550 Luo Jiaxing 2020-12-14 254 static int hisi_gpio_probe(struct platform_device *pdev) 356b01a986a5550 Luo Jiaxing 2020-12-14 255 { 356b01a986a5550 Luo Jiaxing 2020-12-14 256 struct device *dev = &pdev->dev; 356b01a986a5550 Luo Jiaxing 2020-12-14 @257 void __iomem *dat, *set, *clr; 356b01a986a5550 Luo Jiaxing 2020-12-14 258 struct hisi_gpio *hisi_gpio; 356b01a986a5550 Luo Jiaxing 2020-12-14 259 int port_num; 356b01a986a5550 Luo Jiaxing 2020-12-14 260 int ret; 356b01a986a5550 Luo Jiaxing 2020-12-14 261 356b01a986a5550 Luo Jiaxing 2020-12-14 262 /* 356b01a986a5550 Luo Jiaxing 2020-12-14 263 * One GPIO controller own one port currently, 356b01a986a5550 Luo Jiaxing 2020-12-14 264 * if we get more from ACPI table, return error. 356b01a986a5550 Luo Jiaxing 2020-12-14 265 */ 356b01a986a5550 Luo Jiaxing 2020-12-14 266 port_num = device_get_child_node_count(dev); 356b01a986a5550 Luo Jiaxing 2020-12-14 267 if (WARN_ON(port_num != 1)) 356b01a986a5550 Luo Jiaxing 2020-12-14 268 return -ENODEV; 356b01a986a5550 Luo Jiaxing 2020-12-14 269 356b01a986a5550 Luo Jiaxing 2020-12-14 270 hisi_gpio = devm_kzalloc(dev, sizeof(*hisi_gpio), GFP_KERNEL); 356b01a986a5550 Luo Jiaxing 2020-12-14 271 if (!hisi_gpio) 356b01a986a5550 Luo Jiaxing 2020-12-14 272 return -ENOMEM; 356b01a986a5550 Luo Jiaxing 2020-12-14 273 356b01a986a5550 Luo Jiaxing 2020-12-14 274 hisi_gpio->reg_base = devm_platform_ioremap_resource(pdev, 0); 356b01a986a5550 Luo Jiaxing 2020-12-14 275 if (IS_ERR(hisi_gpio->reg_base)) 356b01a986a5550 Luo Jiaxing 2020-12-14 276 return PTR_ERR(hisi_gpio->reg_base); 356b01a986a5550 Luo Jiaxing 2020-12-14 277 356b01a986a5550 Luo Jiaxing 2020-12-14 278 hisi_gpio_get_pdata(dev, hisi_gpio); 356b01a986a5550 Luo Jiaxing 2020-12-14 279 356b01a986a5550 Luo Jiaxing 2020-12-14 280 hisi_gpio->dev = dev; 356b01a986a5550 Luo Jiaxing 2020-12-14 281 356b01a986a5550 Luo Jiaxing 2020-12-14 282 dat = hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX; 356b01a986a5550 Luo Jiaxing 2020-12-14 283 set = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX; 356b01a986a5550 Luo Jiaxing 2020-12-14 284 clr = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX; 356b01a986a5550 Luo Jiaxing 2020-12-14 285 356b01a986a5550 Luo Jiaxing 2020-12-14 286 ret = bgpio_init(&hisi_gpio->chip, hisi_gpio->dev, 0x4, 356b01a986a5550 Luo Jiaxing 2020-12-14 287 hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX, 356b01a986a5550 Luo Jiaxing 2020-12-14 288 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX, 356b01a986a5550 Luo Jiaxing 2020-12-14 289 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX, 356b01a986a5550 Luo Jiaxing 2020-12-14 290 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_SET_WX, 356b01a986a5550 Luo Jiaxing 2020-12-14 291 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_CLR_WX, 356b01a986a5550 Luo Jiaxing 2020-12-14 292 BGPIOF_NO_SET_ON_INPUT); 356b01a986a5550 Luo Jiaxing 2020-12-14 293 if (ret) { 356b01a986a5550 Luo Jiaxing 2020-12-14 294 dev_err(dev, "failed to init, ret = %d\n", ret); 356b01a986a5550 Luo Jiaxing 2020-12-14 295 return ret; 356b01a986a5550 Luo Jiaxing 2020-12-14 296 } 356b01a986a5550 Luo Jiaxing 2020-12-14 297 356b01a986a5550 Luo Jiaxing 2020-12-14 298 hisi_gpio->chip.set_config = hisi_gpio_set_config; 356b01a986a5550 Luo Jiaxing 2020-12-14 299 hisi_gpio->chip.ngpio = hisi_gpio->line_num; 356b01a986a5550 Luo Jiaxing 2020-12-14 300 hisi_gpio->chip.bgpio_dir_unreadable = 1; 356b01a986a5550 Luo Jiaxing 2020-12-14 301 hisi_gpio->chip.base = -1; 356b01a986a5550 Luo Jiaxing 2020-12-14 302 356b01a986a5550 Luo Jiaxing 2020-12-14 303 if (hisi_gpio->irq > 0) 356b01a986a5550 Luo Jiaxing 2020-12-14 304 hisi_gpio_init_irq(hisi_gpio); 356b01a986a5550 Luo Jiaxing 2020-12-14 305 356b01a986a5550 Luo Jiaxing 2020-12-14 306 ret = devm_gpiochip_add_data(dev, &hisi_gpio->chip, hisi_gpio); 356b01a986a5550 Luo Jiaxing 2020-12-14 307 if (ret) { 356b01a986a5550 Luo Jiaxing 2020-12-14 308 dev_err(dev, "failed to register gpiochip, ret = %d\n", ret); 356b01a986a5550 Luo Jiaxing 2020-12-14 309 return ret; 356b01a986a5550 Luo Jiaxing 2020-12-14 310 } 356b01a986a5550 Luo Jiaxing 2020-12-14 311 356b01a986a5550 Luo Jiaxing 2020-12-14 312 return 0; 356b01a986a5550 Luo Jiaxing 2020-12-14 313 } 356b01a986a5550 Luo Jiaxing 2020-12-14 314 :::::: The code at line 257 was first introduced by commit :::::: 356b01a986a5550ee16dd0b85306c6741f2d02d5 gpio: gpio-hisi: Add HiSilicon GPIO support :::::: TO: Luo Jiaxing <luojiaxing(a)huawei.com&gt; :::::: CC: Linus Walleij <linus.walleij(a)linaro.org&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org