tree: https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git gpio/for-next head: ab94f4c529bc92340a54ca2925330e25d2ba16f7 commit: ab94f4c529bc92340a54ca2925330e25d2ba16f7 [71/71] gpio: pcf857x: Fix missing first interrupt config: arc-randconfig-s032-20210218 (attached as .config) compiler: arc-elf-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-215-g0fb77bb6-dirty # https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git/commit/?id... git remote add brgl-linux https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git git fetch --no-tags brgl-linux gpio/for-next git checkout ab94f4c529bc92340a54ca2925330e25d2ba16f7 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): drivers/gpio/gpio-pcf857x.c: In function 'pcf857x_probe': >> drivers/gpio/gpio-pcf857x.c:335:41: error: expected ';' before 'if' 335 | gpio->status = gpio->read(gpio->client) | ^ | ; ...... 338 | if (client->irq) { | ~~ At top level: drivers/gpio/gpio-pcf857x.c:224:13: warning: 'pcf857x_irq_bus_sync_unlock' defined but not used [-Wunused-function] 224 | static void pcf857x_irq_bus_sync_unlock(struct irq_data *data) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpio/gpio-pcf857x.c:217:13: warning: 'pcf857x_irq_bus_lock' defined but not used [-Wunused-function] 217 | static void pcf857x_irq_bus_lock(struct irq_data *data) | ^~~~~~~~~~~~~~~~~~~~ drivers/gpio/gpio-pcf857x.c:210:13: warning: 'pcf857x_irq_disable' defined but not used [-Wunused-function] 210 | static void pcf857x_irq_disable(struct irq_data *data) | ^~~~~~~~~~~~~~~~~~~ drivers/gpio/gpio-pcf857x.c:203:13: warning: 'pcf857x_irq_enable' defined but not used [-Wunused-function] 203 | static void pcf857x_irq_enable(struct irq_data *data) | ^~~~~~~~~~~~~~~~~~ drivers/gpio/gpio-pcf857x.c:196:12: warning: 'pcf857x_irq_set_wake' defined but not used [-Wunused-function] 196 | static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on) | ^~~~~~~~~~~~~~~~~~~~ drivers/gpio/gpio-pcf857x.c:194:13: warning: 'noop' defined but not used [-Wunused-function] 194 | static void noop(struct irq_data *data) { } | ^~~~ drivers/gpio/gpio-pcf857x.c:169:20: warning: 'pcf857x_irq' defined but not used [-Wunused-function] 169 | static irqreturn_t pcf857x_irq(int irq, void *data) | ^~~~~~~~~~~ vim +335 drivers/gpio/gpio-pcf857x.c 232 233 static int pcf857x_probe(struct i2c_client *client, 234 const struct i2c_device_id *id) 235 { 236 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 237 struct device_node *np = client->dev.of_node; 238 struct pcf857x *gpio; 239 unsigned int n_latch = 0; 240 int status; 241 242 if (IS_ENABLED(CONFIG_OF) && np) 243 of_property_read_u32(np, "lines-initial-states", &n_latch); 244 else if (pdata) 245 n_latch = pdata->n_latch; 246 else 247 dev_dbg(&client->dev, "no platform data\n"); 248 249 /* Allocate, initialize, and register this gpio_chip. */ 250 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); 251 if (!gpio) 252 return -ENOMEM; 253 254 mutex_init(&gpio->lock); 255 256 gpio->chip.base = pdata ? pdata->gpio_base : -1; 257 gpio->chip.can_sleep = true; 258 gpio->chip.parent = &client->dev; 259 gpio->chip.owner = THIS_MODULE; 260 gpio->chip.get = pcf857x_get; 261 gpio->chip.set = pcf857x_set; 262 gpio->chip.direction_input = pcf857x_input; 263 gpio->chip.direction_output = pcf857x_output; 264 gpio->chip.ngpio = id->driver_data; 265 266 /* NOTE: the OnSemi jlc1562b is also largely compatible with 267 * these parts, notably for output. It has a low-resolution 268 * DAC instead of pin change IRQs; and its inputs can be the 269 * result of comparators. 270 */ 271 272 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; 273 * 9670, 9672, 9764, and 9764a use quite a variety. 274 * 275 * NOTE: we don't distinguish here between *4 and *4a parts. 276 */ 277 if (gpio->chip.ngpio == 8) { 278 gpio->write = i2c_write_le8; 279 gpio->read = i2c_read_le8; 280 281 if (!i2c_check_functionality(client->adapter, 282 I2C_FUNC_SMBUS_BYTE)) 283 status = -EIO; 284 285 /* fail if there's no chip present */ 286 else 287 status = i2c_smbus_read_byte(client); 288 289 /* '75/'75c addresses are 0x20..0x27, just like the '74; 290 * the '75c doesn't have a current source pulling high. 291 * 9671, 9673, and 9765 use quite a variety of addresses. 292 * 293 * NOTE: we don't distinguish here between '75 and '75c parts. 294 */ 295 } else if (gpio->chip.ngpio == 16) { 296 gpio->write = i2c_write_le16; 297 gpio->read = i2c_read_le16; 298 299 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 300 status = -EIO; 301 302 /* fail if there's no chip present */ 303 else 304 status = i2c_read_le16(client); 305 306 } else { 307 dev_dbg(&client->dev, "unsupported number of gpios\n"); 308 status = -EINVAL; 309 } 310 311 if (status < 0) 312 goto fail; 313 314 gpio->chip.label = client->name; 315 316 gpio->client = client; 317 i2c_set_clientdata(client, gpio); 318 319 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. 320 * We can't actually know whether a pin is configured (a) as output 321 * and driving the signal low, or (b) as input and reporting a low 322 * value ... without knowing the last value written since the chip 323 * came out of reset (if any). We can't read the latched output. 324 * 325 * In short, the only reliable solution for setting up pin direction 326 * is to do it explicitly. The setup() method can do that, but it 327 * may cause transient glitching since it can't know the last value 328 * written (some pins may need to be driven low). 329 * 330 * Using n_latch avoids that trouble. When left initialized to zero, 331 * our software copy of the "latch" then matches the chip's all-ones 332 * reset state. Otherwise it flags pins to be driven low. 333 */ 334 gpio->out = ~n_latch; > 335 gpio->status = gpio->read(gpio->client) 336 337 /* Enable irqchip if we have an interrupt */ 338 if (client->irq) { 339 struct gpio_irq_chip *girq; 340 341 gpio->irqchip.name = "pcf857x"; 342 gpio->irqchip.irq_enable = pcf857x_irq_enable; 343 gpio->irqchip.irq_disable = pcf857x_irq_disable; 344 gpio->irqchip.irq_ack = noop; 345 gpio->irqchip.irq_mask = noop; 346 gpio->irqchip.irq_unmask = noop; 347 gpio->irqchip.irq_set_wake = pcf857x_irq_set_wake; 348 gpio->irqchip.irq_bus_lock = pcf857x_irq_bus_lock; 349 gpio->irqchip.irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock; 350 351 status = devm_request_threaded_irq(&client->dev, client->irq, 352 NULL, pcf857x_irq, IRQF_ONESHOT | 353 IRQF_TRIGGER_FALLING | IRQF_SHARED, 354 dev_name(&client->dev), gpio); 355 if (status) 356 goto fail; 357 358 girq = &gpio->chip.irq; 359 girq->chip = &gpio->irqchip; 360 /* This will let us handle the parent IRQ in the driver */ 361 girq->parent_handler = NULL; 362 girq->num_parents = 0; 363 girq->parents = NULL; 364 girq->default_type = IRQ_TYPE_NONE; 365 girq->handler = handle_level_irq; 366 girq->threaded = true; 367 } 368 369 status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio); 370 if (status < 0) 371 goto fail; 372 373 /* Let platform code set up the GPIOs and their users. 374 * Now is the first time anyone could use them. 375 */ 376 if (pdata && pdata->setup) { 377 status = pdata->setup(client, 378 gpio->chip.base, gpio->chip.ngpio, 379 pdata->context); 380 if (status < 0) 381 dev_warn(&client->dev, "setup --> %d\n", status); 382 } 383 384 dev_info(&client->dev, "probed\n"); 385 386 return 0; 387 388 fail: 389 dev_dbg(&client->dev, "probe error %d for '%s'\n", status, 390 client->name); 391 392 return status; 393 } 394 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org