Hi Arvind, FYI, the error/warning still remains. tree: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git queue/4.19 head: 7725add280ae13ca07a21c62a19af15696689710 commit: b207caff4176e3a6ba273243da2db2e595e4aad2 [5098/9999] compiler.h: fix barrier_data() on clang config: riscv-allmodconfig (https://download.01.org/0day-ci/archive/20220212/202202120007.oRXqxDqZ-lk...) compiler: riscv64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.gi... git remote add linux-stable-rc https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git git fetch --no-tags linux-stable-rc queue/4.19 git checkout b207caff4176e3a6ba273243da2db2e595e4aad2 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/net/ethernet/mellanox/mlx5/core/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): In file included from include/linux/prefetch.h:15, from drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c:33: arch/riscv/include/asm/processor.h: In function 'cpu_relax': 82 | barrier(); | ^~~~~~~ In file included from drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c:37: At top level: drivers/net/ethernet/mellanox/mlx5/core/en.h:208:19: warning: 'mlx5e_priv_flags' defined but not used [-Wunused-const-variable=] 208 | static const char mlx5e_priv_flags[][ETH_GSTRING_LEN] = { | ^~~~~~~~~~~~~~~~ cc1: some warnings being treated as errors vim +/barrier +82 arch/riscv/include/asm/processor.h 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 73 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 74 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 75 static inline void cpu_relax(void) 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 76 { 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 77 #ifdef __riscv_muldiv 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 78 int dummy; 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 79 /* In lieu of a halt instruction, induce a long-latency stall. */ 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 80 __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy)); 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 81 #endif 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 @82 barrier(); 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 83 } 7db91e57a0acde1 Palmer Dabbelt 2017-07-10 84 :::::: The code at line 82 was first introduced by commit :::::: 7db91e57a0acde126a162ababfb1e0ab190130cb RISC-V: Task implementation :::::: TO: Palmer Dabbelt <palmer(a)dabbelt.com&gt; :::::: CC: Palmer Dabbelt <palmer(a)dabbelt.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org