tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 42f82040ee66db13525dc6f14b8559890b2f4c1c commit: a5460b5e5fb82656807840d40d3deaecad094044 READ_ONCE: Simplify implementations of {READ,WRITE}_ONCE() date: 3 months ago config: arm64-randconfig-s031-20200710 (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.2-37-gc9676a3b-dirty git checkout a5460b5e5fb82656807840d40d3deaecad094044 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; sparse warnings: (new ones prefixed by >>) drivers/i2c/busses/i2c-xgene-slimpro.c:131:15: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:131:15: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:131:15: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:131:15: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:188:9: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short volatile @@ got restricted __le16 [usertype] @@ drivers/i2c/busses/i2c-xgene-slimpro.c:188:9: sparse: expected unsigned short volatile drivers/i2c/busses/i2c-xgene-slimpro.c:188:9: sparse: got restricted __le16 [usertype] drivers/i2c/busses/i2c-xgene-slimpro.c:191:18: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:191:18: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:191:18: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:191:18: sparse: sparse: cast to restricted __le16 drivers/i2c/busses/i2c-xgene-slimpro.c:193:9: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short volatile @@ got restricted __le16 [usertype] @@ drivers/i2c/busses/i2c-xgene-slimpro.c:193:9: sparse: expected unsigned short volatile drivers/i2c/busses/i2c-xgene-slimpro.c:193:9: sparse: got restricted __le16 [usertype] drivers/i2c/busses/i2c-xgene-slimpro.c:197:17: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int volatile @@ got restricted __le32 [usertype] @@ drivers/i2c/busses/i2c-xgene-slimpro.c:197:17: sparse: expected unsigned int volatile drivers/i2c/busses/i2c-xgene-slimpro.c:197:17: sparse: got restricted __le32 [usertype] vim +134 drivers/i2c/busses/i2c-xgene-slimpro.c da24b8240fe6af Hoan Tran 2017-10-30 123 df5da47fe722e3 Hoan Tran 2017-04-24 124 /* df5da47fe722e3 Hoan Tran 2017-04-24 125 * This function tests and clears a bitmask then returns its old value df5da47fe722e3 Hoan Tran 2017-04-24 126 */ df5da47fe722e3 Hoan Tran 2017-04-24 127 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask) df5da47fe722e3 Hoan Tran 2017-04-24 128 { df5da47fe722e3 Hoan Tran 2017-04-24 129 u16 ret, val; df5da47fe722e3 Hoan Tran 2017-04-24 130 df5da47fe722e3 Hoan Tran 2017-04-24 @131 val = le16_to_cpu(READ_ONCE(*addr)); df5da47fe722e3 Hoan Tran 2017-04-24 132 ret = val & mask; df5da47fe722e3 Hoan Tran 2017-04-24 133 val &= ~mask; df5da47fe722e3 Hoan Tran 2017-04-24 @134 WRITE_ONCE(*addr, cpu_to_le16(val)); df5da47fe722e3 Hoan Tran 2017-04-24 135 df5da47fe722e3 Hoan Tran 2017-04-24 136 return ret; df5da47fe722e3 Hoan Tran 2017-04-24 137 } df5da47fe722e3 Hoan Tran 2017-04-24 138 f6505fbabc426b Feng Kan 2015-04-24 139 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg) f6505fbabc426b Feng Kan 2015-04-24 140 { f6505fbabc426b Feng Kan 2015-04-24 141 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); f6505fbabc426b Feng Kan 2015-04-24 142 f6505fbabc426b Feng Kan 2015-04-24 143 /* f6505fbabc426b Feng Kan 2015-04-24 144 * Response message format: f6505fbabc426b Feng Kan 2015-04-24 145 * mssg[0] is the return code of the operation f6505fbabc426b Feng Kan 2015-04-24 146 * mssg[1] is the first data word f6505fbabc426b Feng Kan 2015-04-24 147 * mssg[2] is NOT used f6505fbabc426b Feng Kan 2015-04-24 148 */ f6505fbabc426b Feng Kan 2015-04-24 149 if (ctx->resp_msg) f6505fbabc426b Feng Kan 2015-04-24 150 *ctx->resp_msg = ((u32 *)mssg)[1]; f6505fbabc426b Feng Kan 2015-04-24 151 f6505fbabc426b Feng Kan 2015-04-24 152 if (ctx->mbox_client.tx_block) f6505fbabc426b Feng Kan 2015-04-24 153 complete(&ctx->rd_complete); f6505fbabc426b Feng Kan 2015-04-24 154 } f6505fbabc426b Feng Kan 2015-04-24 155 df5da47fe722e3 Hoan Tran 2017-04-24 156 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg) df5da47fe722e3 Hoan Tran 2017-04-24 157 { df5da47fe722e3 Hoan Tran 2017-04-24 158 struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl); df5da47fe722e3 Hoan Tran 2017-04-24 159 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; df5da47fe722e3 Hoan Tran 2017-04-24 160 df5da47fe722e3 Hoan Tran 2017-04-24 161 /* Check if platform sends interrupt */ df5da47fe722e3 Hoan Tran 2017-04-24 162 if (!xgene_word_tst_and_clr(&generic_comm_base->status, df5da47fe722e3 Hoan Tran 2017-04-24 163 PCC_STS_SCI_DOORBELL)) df5da47fe722e3 Hoan Tran 2017-04-24 164 return; df5da47fe722e3 Hoan Tran 2017-04-24 165 df5da47fe722e3 Hoan Tran 2017-04-24 166 if (xgene_word_tst_and_clr(&generic_comm_base->status, df5da47fe722e3 Hoan Tran 2017-04-24 167 PCC_STS_CMD_COMPLETE)) { df5da47fe722e3 Hoan Tran 2017-04-24 168 msg = generic_comm_base + 1; df5da47fe722e3 Hoan Tran 2017-04-24 169 df5da47fe722e3 Hoan Tran 2017-04-24 170 /* Response message msg[1] contains the return value. */ df5da47fe722e3 Hoan Tran 2017-04-24 171 if (ctx->resp_msg) df5da47fe722e3 Hoan Tran 2017-04-24 172 *ctx->resp_msg = ((u32 *)msg)[1]; df5da47fe722e3 Hoan Tran 2017-04-24 173 df5da47fe722e3 Hoan Tran 2017-04-24 174 complete(&ctx->rd_complete); df5da47fe722e3 Hoan Tran 2017-04-24 175 } df5da47fe722e3 Hoan Tran 2017-04-24 176 } df5da47fe722e3 Hoan Tran 2017-04-24 177 df5da47fe722e3 Hoan Tran 2017-04-24 178 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg) df5da47fe722e3 Hoan Tran 2017-04-24 179 { df5da47fe722e3 Hoan Tran 2017-04-24 180 struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; df5da47fe722e3 Hoan Tran 2017-04-24 181 u32 *ptr = (void *)(generic_comm_base + 1); df5da47fe722e3 Hoan Tran 2017-04-24 182 u16 status; df5da47fe722e3 Hoan Tran 2017-04-24 183 int i; df5da47fe722e3 Hoan Tran 2017-04-24 184 df5da47fe722e3 Hoan Tran 2017-04-24 @185 WRITE_ONCE(generic_comm_base->signature, df5da47fe722e3 Hoan Tran 2017-04-24 186 cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx)); df5da47fe722e3 Hoan Tran 2017-04-24 187 df5da47fe722e3 Hoan Tran 2017-04-24 188 WRITE_ONCE(generic_comm_base->command, df5da47fe722e3 Hoan Tran 2017-04-24 189 cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT)); df5da47fe722e3 Hoan Tran 2017-04-24 190 df5da47fe722e3 Hoan Tran 2017-04-24 191 status = le16_to_cpu(READ_ONCE(generic_comm_base->status)); df5da47fe722e3 Hoan Tran 2017-04-24 192 status &= ~PCC_STS_CMD_COMPLETE; df5da47fe722e3 Hoan Tran 2017-04-24 193 WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status)); df5da47fe722e3 Hoan Tran 2017-04-24 194 df5da47fe722e3 Hoan Tran 2017-04-24 195 /* Copy the message to the PCC comm space */ df5da47fe722e3 Hoan Tran 2017-04-24 196 for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++) df5da47fe722e3 Hoan Tran 2017-04-24 197 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i])); df5da47fe722e3 Hoan Tran 2017-04-24 198 } df5da47fe722e3 Hoan Tran 2017-04-24 199 :::::: The code at line 134 was first introduced by commit :::::: df5da47fe722e36055b97134e6bb9df58c12495c i2c: xgene-slimpro: Add ACPI support by using PCC mailbox :::::: TO: Hoan Tran <hotran(a)apm.com&gt; :::::: CC: Wolfram Sang <wsa(a)the-dreams.de&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org