tree: https://github.com/omap-audio/linux-audio peter/ti-linux-5.4.y/wip head: 00f8eae5e721a0a2673c070c612b26aee41e0c07 commit: 499fed33f5b68bb522b77c9121ad86ba25df5e16 [25/34] dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair config: arm64-randconfig-r004-20200716 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project ed6b578040a85977026c93bf4188f996148f3218) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu git checkout 499fed33f5b68bb522b77c9121ad86ba25df5e16 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): err_ringrx_free: ^~~~~~~~~~~~~~~~ 1 warning generated. vim +/err_ringrx_free +662 drivers/dma/ti/k3-udma-glue.c ebc6a5418e45fa Grygorii Strashko 2019-12-09 554 ebc6a5418e45fa Grygorii Strashko 2019-12-09 555 static int k3_udma_glue_cfg_rx_flow(struct k3_udma_glue_rx_channel *rx_chn, ebc6a5418e45fa Grygorii Strashko 2019-12-09 556 u32 flow_idx, ebc6a5418e45fa Grygorii Strashko 2019-12-09 557 struct k3_udma_glue_rx_flow_cfg *flow_cfg) ebc6a5418e45fa Grygorii Strashko 2019-12-09 558 { ebc6a5418e45fa Grygorii Strashko 2019-12-09 559 struct k3_udma_glue_rx_flow *flow = &rx_chn->flows[flow_idx]; ebc6a5418e45fa Grygorii Strashko 2019-12-09 560 const struct udma_tisci_rm *tisci_rm = rx_chn->common.tisci_rm; ebc6a5418e45fa Grygorii Strashko 2019-12-09 561 struct device *dev = rx_chn->common.dev; ebc6a5418e45fa Grygorii Strashko 2019-12-09 562 struct ti_sci_msg_rm_udmap_flow_cfg req; ebc6a5418e45fa Grygorii Strashko 2019-12-09 563 int rx_ring_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 564 int rx_ringfdq_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 565 int ret = 0; ebc6a5418e45fa Grygorii Strashko 2019-12-09 566 ebc6a5418e45fa Grygorii Strashko 2019-12-09 567 flow->udma_rflow = xudma_rflow_get(rx_chn->common.udmax, ebc6a5418e45fa Grygorii Strashko 2019-12-09 568 flow->udma_rflow_id); ebc6a5418e45fa Grygorii Strashko 2019-12-09 569 if (IS_ERR(flow->udma_rflow)) { ebc6a5418e45fa Grygorii Strashko 2019-12-09 570 ret = PTR_ERR(flow->udma_rflow); ebc6a5418e45fa Grygorii Strashko 2019-12-09 571 dev_err(dev, "UDMAX rflow get err %d\n", ret); a2058b7895a45f Christophe JAILLET 2020-03-18 572 return ret; ebc6a5418e45fa Grygorii Strashko 2019-12-09 573 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 574 ebc6a5418e45fa Grygorii Strashko 2019-12-09 575 if (flow->udma_rflow_id != xudma_rflow_get_id(flow->udma_rflow)) { a2058b7895a45f Christophe JAILLET 2020-03-18 576 ret = -ENODEV; a2058b7895a45f Christophe JAILLET 2020-03-18 577 goto err_rflow_put; ebc6a5418e45fa Grygorii Strashko 2019-12-09 578 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 579 ebc6a5418e45fa Grygorii Strashko 2019-12-09 580 /* request and cfg rings */ 499fed33f5b68b Peter Ujfalusi 2020-07-01 581 ret = k3_ringacc_request_rings_pair(rx_chn->common.ringacc, 499fed33f5b68b Peter Ujfalusi 2020-07-01 582 flow_cfg->ring_rxq_id, 499fed33f5b68b Peter Ujfalusi 2020-07-01 583 flow_cfg->ring_rxfdq0_id, 499fed33f5b68b Peter Ujfalusi 2020-07-01 584 &flow->ringrxfdq, 499fed33f5b68b Peter Ujfalusi 2020-07-01 585 &flow->ringrx); 499fed33f5b68b Peter Ujfalusi 2020-07-01 586 if (ret) { 499fed33f5b68b Peter Ujfalusi 2020-07-01 587 dev_err(dev, "Failed to get RX/RXFDQ rings %d\n", ret); a2058b7895a45f Christophe JAILLET 2020-03-18 588 goto err_rflow_put; ebc6a5418e45fa Grygorii Strashko 2019-12-09 589 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 590 ebc6a5418e45fa Grygorii Strashko 2019-12-09 591 ret = k3_ringacc_ring_cfg(flow->ringrx, &flow_cfg->rx_cfg); ebc6a5418e45fa Grygorii Strashko 2019-12-09 592 if (ret) { ebc6a5418e45fa Grygorii Strashko 2019-12-09 593 dev_err(dev, "Failed to cfg ringrx %d\n", ret); a2058b7895a45f Christophe JAILLET 2020-03-18 594 goto err_ringrxfdq_free; ebc6a5418e45fa Grygorii Strashko 2019-12-09 595 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 596 ebc6a5418e45fa Grygorii Strashko 2019-12-09 597 ret = k3_ringacc_ring_cfg(flow->ringrxfdq, &flow_cfg->rxfdq_cfg); ebc6a5418e45fa Grygorii Strashko 2019-12-09 598 if (ret) { ebc6a5418e45fa Grygorii Strashko 2019-12-09 599 dev_err(dev, "Failed to cfg ringrxfdq %d\n", ret); a2058b7895a45f Christophe JAILLET 2020-03-18 600 goto err_ringrxfdq_free; ebc6a5418e45fa Grygorii Strashko 2019-12-09 601 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 602 ebc6a5418e45fa Grygorii Strashko 2019-12-09 603 if (rx_chn->remote) { ebc6a5418e45fa Grygorii Strashko 2019-12-09 604 rx_ring_id = TI_SCI_RESOURCE_NULL; ebc6a5418e45fa Grygorii Strashko 2019-12-09 605 rx_ringfdq_id = TI_SCI_RESOURCE_NULL; ebc6a5418e45fa Grygorii Strashko 2019-12-09 606 } else { ebc6a5418e45fa Grygorii Strashko 2019-12-09 607 rx_ring_id = k3_ringacc_get_ring_id(flow->ringrx); ebc6a5418e45fa Grygorii Strashko 2019-12-09 608 rx_ringfdq_id = k3_ringacc_get_ring_id(flow->ringrxfdq); ebc6a5418e45fa Grygorii Strashko 2019-12-09 609 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 610 ebc6a5418e45fa Grygorii Strashko 2019-12-09 611 memset(&req, 0, sizeof(req)); ebc6a5418e45fa Grygorii Strashko 2019-12-09 612 ebc6a5418e45fa Grygorii Strashko 2019-12-09 613 req.valid_params = ebc6a5418e45fa Grygorii Strashko 2019-12-09 614 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 615 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 616 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 617 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 618 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 619 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 620 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 621 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 622 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 623 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 624 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 625 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID | ebc6a5418e45fa Grygorii Strashko 2019-12-09 626 TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID; ebc6a5418e45fa Grygorii Strashko 2019-12-09 627 req.nav_id = tisci_rm->tisci_dev_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 628 req.flow_index = flow->udma_rflow_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 629 if (rx_chn->common.epib) ebc6a5418e45fa Grygorii Strashko 2019-12-09 630 req.rx_einfo_present = 1; ebc6a5418e45fa Grygorii Strashko 2019-12-09 631 if (rx_chn->common.psdata_size) ebc6a5418e45fa Grygorii Strashko 2019-12-09 632 req.rx_psinfo_present = 1; ebc6a5418e45fa Grygorii Strashko 2019-12-09 633 if (flow_cfg->rx_error_handling) ebc6a5418e45fa Grygorii Strashko 2019-12-09 634 req.rx_error_handling = 1; ebc6a5418e45fa Grygorii Strashko 2019-12-09 635 req.rx_desc_type = 0; ebc6a5418e45fa Grygorii Strashko 2019-12-09 636 req.rx_dest_qnum = rx_ring_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 637 req.rx_src_tag_hi_sel = 0; ebc6a5418e45fa Grygorii Strashko 2019-12-09 638 req.rx_src_tag_lo_sel = flow_cfg->src_tag_lo_sel; ebc6a5418e45fa Grygorii Strashko 2019-12-09 639 req.rx_dest_tag_hi_sel = 0; ebc6a5418e45fa Grygorii Strashko 2019-12-09 640 req.rx_dest_tag_lo_sel = 0; ebc6a5418e45fa Grygorii Strashko 2019-12-09 641 req.rx_fdq0_sz0_qnum = rx_ringfdq_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 642 req.rx_fdq1_qnum = rx_ringfdq_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 643 req.rx_fdq2_qnum = rx_ringfdq_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 644 req.rx_fdq3_qnum = rx_ringfdq_id; ebc6a5418e45fa Grygorii Strashko 2019-12-09 645 ebc6a5418e45fa Grygorii Strashko 2019-12-09 646 ret = tisci_rm->tisci_udmap_ops->rx_flow_cfg(tisci_rm->tisci, &req); ebc6a5418e45fa Grygorii Strashko 2019-12-09 647 if (ret) { ebc6a5418e45fa Grygorii Strashko 2019-12-09 648 dev_err(dev, "flow%d config failed: %d\n", flow->udma_rflow_id, ebc6a5418e45fa Grygorii Strashko 2019-12-09 649 ret); a2058b7895a45f Christophe JAILLET 2020-03-18 650 goto err_ringrxfdq_free; ebc6a5418e45fa Grygorii Strashko 2019-12-09 651 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 652 ebc6a5418e45fa Grygorii Strashko 2019-12-09 653 rx_chn->flows_ready++; ebc6a5418e45fa Grygorii Strashko 2019-12-09 654 dev_dbg(dev, "flow%d config done. ready:%d\n", ebc6a5418e45fa Grygorii Strashko 2019-12-09 655 flow->udma_rflow_id, rx_chn->flows_ready); ebc6a5418e45fa Grygorii Strashko 2019-12-09 656 ebc6a5418e45fa Grygorii Strashko 2019-12-09 657 return 0; a2058b7895a45f Christophe JAILLET 2020-03-18 658 a2058b7895a45f Christophe JAILLET 2020-03-18 659 err_ringrxfdq_free: a2058b7895a45f Christophe JAILLET 2020-03-18 660 k3_ringacc_ring_free(flow->ringrxfdq); a2058b7895a45f Christophe JAILLET 2020-03-18 661 a2058b7895a45f Christophe JAILLET 2020-03-18 @662 err_ringrx_free: a2058b7895a45f Christophe JAILLET 2020-03-18 663 k3_ringacc_ring_free(flow->ringrx); a2058b7895a45f Christophe JAILLET 2020-03-18 664 a2058b7895a45f Christophe JAILLET 2020-03-18 665 err_rflow_put: a2058b7895a45f Christophe JAILLET 2020-03-18 666 xudma_rflow_put(rx_chn->common.udmax, flow->udma_rflow); a2058b7895a45f Christophe JAILLET 2020-03-18 667 flow->udma_rflow = NULL; a2058b7895a45f Christophe JAILLET 2020-03-18 668 ebc6a5418e45fa Grygorii Strashko 2019-12-09 669 return ret; ebc6a5418e45fa Grygorii Strashko 2019-12-09 670 } ebc6a5418e45fa Grygorii Strashko 2019-12-09 671 :::::: The code at line 662 was first introduced by commit :::::: a2058b7895a45fa9668bf77d4235302e803d6fac dmaengine: ti: k3-udma-glue: Fix an error handling path in 'k3_udma_glue_cfg_rx_flow()' :::::: TO: Christophe JAILLET <christophe.jaillet(a)wanadoo.fr&gt; :::::: CC: Peter Ujfalusi <peter.ujfalusi(a)ti.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org