tree: git://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp.git lr/nand/cafe-nand-exec-op-debug head: ca82ff45fe30d46aad41d713abb8f8d381a8264f commit: e06af39cbcf87124b53029c3d91fa5ed0230b053 [74/104] mtd: rawnand: bcm47xx: Merge all source files config: alpha-allyesconfig (attached as .config) compiler: alpha-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout e06af39cbcf87124b53029c3d91fa5ed0230b053 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=alpha If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>, old ones prefixed by <<): 235 | int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ vim +/bcm47xxnflash_ops_bcm4706_init +235 drivers/mtd/nand/raw/bcm47xx-nand-controller.c 344f8f81f468ab drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c Boris Brezillon 2020-04-19 230 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 231 /************************************************** 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 232 * Init 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 233 **************************************************/ 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 234 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 @235 int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n) 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 236 { 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 237 int err; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 238 u32 freq; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 239 u16 clock; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 240 u8 w0, w1, w2, w3, w4; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 241 344f8f81f468ab drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c Boris Brezillon 2020-04-19 242 nand_controller_init(&b47n->base); 344f8f81f468ab drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c Boris Brezillon 2020-04-19 243 b47n->base.ops = &bcm47xxnflash_ops; 344f8f81f468ab drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c Boris Brezillon 2020-04-19 244 b47n->nand_chip.controller = &b47n->base; 3c01d4cb7576ff drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 245 b47n->nand_chip.bbt_options = NAND_BBT_USE_FLASH; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 246 b47n->nand_chip.ecc.mode = NAND_ECC_NONE; /* TODO: implement ECC */ 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 247 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 248 /* Enable NAND flash access */ 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 249 bcma_cc_set32(b47n->cc, BCMA_CC_4706_FLASHSCFG, 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 250 BCMA_CC_4706_FLASHSCFG_NF1); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 251 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 252 /* Configure wait counters */ 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 253 if (b47n->cc->status & BCMA_CC_CHIPST_4706_PKG_OPTION) { 785e5e111f2187 drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2014-08-19 254 /* 400 MHz */ 785e5e111f2187 drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2014-08-19 255 freq = 400000000 / 4; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 256 } else { 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 257 freq = bcma_chipco_pll_read(b47n->cc, 4); 785e5e111f2187 drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2014-08-19 258 freq = (freq & 0xFFF) >> 3; 785e5e111f2187 drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2014-08-19 259 /* Fixed reference clock 25 MHz and m = 2 */ 785e5e111f2187 drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2014-08-19 260 freq = (freq * 25000000 / 2) / 4; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 261 } 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 262 clock = freq / 1000000; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 263 w0 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(15, clock); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 264 w1 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(20, clock); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 265 w2 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 266 w3 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 267 w4 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(100, clock); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 268 bcma_cc_write32(b47n->cc, BCMA_CC_NFLASH_WAITCNT0, 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 269 (w4 << 24 | w3 << 18 | w2 << 12 | w1 << 6 | w0)); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 270 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 271 /* Scan NAND */ 00ad378f304a09 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c Boris Brezillon 2018-09-06 272 err = nand_scan(&b47n->nand_chip, 1); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 273 if (err) { 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 274 pr_err("Could not scan NAND flash: %d\n", err); 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 275 bcma_cc_mask32(b47n->cc, BCMA_CC_4706_FLASHSCFG, 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 276 ~BCMA_CC_4706_FLASHSCFG_NF1); 20a1a41adcb667 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c Boris Brezillon 2020-04-19 277 } 20a1a41adcb667 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c Boris Brezillon 2020-04-19 278 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 279 return err; 19c0921c842e0a drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c Rafał Miłecki 2012-11-12 280 } e06af39cbcf871 drivers/mtd/nand/raw/bcm47xx-nand-controller.c Boris Brezillon 2020-04-19 281 :::::: The code at line 235 was first introduced by commit :::::: 19c0921c842e0aa9ce8c540c9134fd358acc9b28 mtd: bcm47xxnflash: init NAND on BCM4706 :::::: TO: Rafał Miłecki <zajec5(a)gmail.com&gt; :::::: CC: Artem Bityutskiy <artem.bityutskiy(a)linux.intel.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org