Hi Thomas, I love your patch! Yet something to improve: [auto build test ERROR on kvm/linux-next] [also build test ERROR on tip/auto-latest linus/master v5.7-rc6 next-20200519] [cannot apply to linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Thomas-Gleixner/x86-KVM-Async-PF... base: https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next config: x86_64-allyesconfig (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project e6658079aca6d971b4e9d7137a3a2ecbc9c34aec) reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>, old ones prefixed by <<): << In file included from arch/x86/kvm/vmx/vmx.c:50: trace_hardirqs_on_prepare(); ^ arch/x86/kvm/vmx/vmx.c:6739:2: note: did you mean 'trace_hardirqs_on'? include/linux/irqflags.h:32:15: note: 'trace_hardirqs_on' declared here extern void trace_hardirqs_on(void); ^ << In file included from arch/x86/kvm/vmx/vmx.c:50: lockdep_hardirqs_on_prepare(CALLER_ADDR0); ^ arch/x86/kvm/vmx/vmx.c:6740:2: note: did you mean 'trace_hardirqs_on_prepare'? arch/x86/kvm/vmx/vmx.c:6739:2: note: 'trace_hardirqs_on_prepare' declared here trace_hardirqs_on_prepare(); ^ << In file included from arch/x86/kvm/vmx/vmx.c:50: trace_hardirqs_off_prepare(); ^ arch/x86/kvm/vmx/vmx.c:6772:2: note: did you mean 'trace_hardirqs_on_prepare'? arch/x86/kvm/vmx/vmx.c:6739:2: note: 'trace_hardirqs_on_prepare' declared here trace_hardirqs_on_prepare(); ^ 3 errors generated. vim +/trace_hardirqs_on_prepare +6739 arch/x86/kvm/vmx/vmx.c 6650 6651 static fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu) 6652 { 6653 fastpath_t exit_fastpath; 6654 struct vcpu_vmx *vmx = to_vmx(vcpu); 6655 unsigned long cr3, cr4; 6656 6657 reenter_guest: 6658 /* Record the guest's net vcpu time for enforced NMI injections. */ 6659 if (unlikely(!enable_vnmi && 6660 vmx->loaded_vmcs->soft_vnmi_blocked)) 6661 vmx->loaded_vmcs->entry_time = ktime_get(); 6662 6663 /* Don't enter VMX if guest state is invalid, let the exit handler 6664 start emulation until we arrive back to a valid state */ 6665 if (vmx->emulation_required) 6666 return EXIT_FASTPATH_NONE; 6667 6668 if (vmx->ple_window_dirty) { 6669 vmx->ple_window_dirty = false; 6670 vmcs_write32(PLE_WINDOW, vmx->ple_window); 6671 } 6672 6673 /* 6674 * We did this in prepare_switch_to_guest, because it needs to 6675 * be within srcu_read_lock. 6676 */ 6677 WARN_ON_ONCE(vmx->nested.need_vmcs12_to_shadow_sync); 6678 6679 if (kvm_register_is_dirty(vcpu, VCPU_REGS_RSP)) 6680 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]); 6681 if (kvm_register_is_dirty(vcpu, VCPU_REGS_RIP)) 6682 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]); 6683 6684 cr3 = __get_current_cr3_fast(); 6685 if (unlikely(cr3 != vmx->loaded_vmcs->host_state.cr3)) { 6686 vmcs_writel(HOST_CR3, cr3); 6687 vmx->loaded_vmcs->host_state.cr3 = cr3; 6688 } 6689 6690 cr4 = cr4_read_shadow(); 6691 if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) { 6692 vmcs_writel(HOST_CR4, cr4); 6693 vmx->loaded_vmcs->host_state.cr4 = cr4; 6694 } 6695 6696 /* When single-stepping over STI and MOV SS, we must clear the 6697 * corresponding interruptibility bits in the guest state. Otherwise 6698 * vmentry fails as it then expects bit 14 (BS) in pending debug 6699 * exceptions being set, but that's not correct for the guest debugging 6700 * case. */ 6701 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 6702 vmx_set_interrupt_shadow(vcpu, 0); 6703 6704 kvm_load_guest_xsave_state(vcpu); 6705 6706 pt_guest_enter(vmx); 6707 6708 if (vcpu_to_pmu(vcpu)->version) 6709 atomic_switch_perf_msrs(vmx); 6710 atomic_switch_umwait_control_msr(vmx); 6711 6712 if (enable_preemption_timer) 6713 vmx_update_hv_timer(vcpu); 6714 6715 if (lapic_in_kernel(vcpu) && 6716 vcpu->arch.apic->lapic_timer.timer_advance_ns) 6717 kvm_wait_lapic_expire(vcpu); 6718 6719 /* 6720 * If this vCPU has touched SPEC_CTRL, restore the guest's value if 6721 * it's non-zero. Since vmentry is serialising on affected CPUs, there 6722 * is no need to worry about the conditional branch over the wrmsr 6723 * being speculatively taken. 6724 */ 6725 x86_spec_ctrl_set_guest(vmx->spec_ctrl, 0); 6726 6727 /* 6728 * VMENTER enables interrupts (host state), but the kernel state is 6729 * interrupts disabled when this is invoked. Also tell RCU about 6730 * it. This is the same logic as for exit_to_user_mode(). 6731 * 6732 * This ensures that e.g. latency analysis on the host observes 6733 * guest mode as interrupt enabled. 6734 * 6735 * guest_enter_irqoff() informs context tracking about the 6736 * transition to guest mode and if enabled adjusts RCU state 6737 * accordingly. 6738 */ 6741 guest_enter_irqoff(); 6742 lockdep_hardirqs_on(CALLER_ADDR0); 6743 6744 /* L1D Flush includes CPU buffer clear to mitigate MDS */ 6745 if (static_branch_unlikely(&vmx_l1d_should_flush)) 6746 vmx_l1d_flush(vcpu); 6747 else if (static_branch_unlikely(&mds_user_clear)) 6748 mds_clear_cpu_buffers(); 6749 6750 if (vcpu->arch.cr2 != read_cr2()) 6751 write_cr2(vcpu->arch.cr2); 6752 6753 vmx->fail = __vmx_vcpu_run(vmx, (unsigned long *)&vcpu->arch.regs, 6754 vmx->loaded_vmcs->launched); 6755 6756 vcpu->arch.cr2 = read_cr2(); 6757 6758 /* 6759 * VMEXIT disables interrupts (host state), but tracing and lockdep 6760 * have them in state 'on' as recorded before entering guest mode. 6761 * Same as enter_from_user_mode(). 6762 * 6763 * guest_exit_irqoff() restores host context and reinstates RCU if 6764 * enabled and required. 6765 * 6766 * This needs to be done before the below as native_read_msr() 6767 * contains a tracepoint and x86_spec_ctrl_restore_host() calls 6768 * into world and some more. 6769 */ 6770 lockdep_hardirqs_off(CALLER_ADDR0); 6771 guest_exit_irqoff(); 6773 6774 /* 6775 * We do not use IBRS in the kernel. If this vCPU has used the 6776 * SPEC_CTRL MSR it may have left it on; save the value and 6777 * turn it off. This is much more efficient than blindly adding 6778 * it to the atomic save/restore list. Especially as the former 6779 * (Saving guest MSRs on vmexit) doesn't even exist in KVM. 6780 * 6781 * For non-nested case: 6782 * If the L01 MSR bitmap does not intercept the MSR, then we need to 6783 * save it. 6784 * 6785 * For nested case: 6786 * If the L02 MSR bitmap does not intercept the MSR, then we need to 6787 * save it. 6788 */ 6789 if (unlikely(!msr_write_intercepted(vcpu, MSR_IA32_SPEC_CTRL))) 6790 vmx->spec_ctrl = native_read_msr(MSR_IA32_SPEC_CTRL); 6791 6792 x86_spec_ctrl_restore_host(vmx->spec_ctrl, 0); 6793 6794 /* All fields are clean at this point */ 6795 if (static_branch_unlikely(&enable_evmcs)) 6796 current_evmcs->hv_clean_fields |= 6797 HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL; 6798 6799 if (static_branch_unlikely(&enable_evmcs)) 6800 current_evmcs->hv_vp_id = vcpu->arch.hyperv.vp_index; 6801 6802 /* MSR_IA32_DEBUGCTLMSR is zeroed on vmexit. Restore it if needed */ 6803 if (vmx->host_debugctlmsr) 6804 update_debugctlmsr(vmx->host_debugctlmsr); 6805 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org