Hi Srujana, I love your patch! Yet something to improve: [auto build test ERROR on ipvs/master] [also build test ERROR on linus/master v5.9 next-20201009] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Srujana-Challa/octeontx2-af-add-... base: https://git.kernel.org/pub/scm/linux/kernel/git/horms/ipvs.git master config: arm64-randconfig-r001-20201012 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 9e72d3eaf38f217698f72cb8fdc969a6e72dad3a) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # https://github.com/0day-ci/linux/commit/e56a51df7a3a1e85e34c91f054ed9e042... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Srujana-Challa/octeontx2-af-add-debugfs-entries-for-CPT-block/20201012-161457 git checkout e56a51df7a3a1e85e34c91f054ed9e042df486c5 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e)); ^ drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1833:33: error: use of undeclared identifier 'CPT_AF_CONSTANTS1' reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(e)); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_ACTIVE(e)); ^ drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1861:34: note: did you mean 'CPT_AF_EXEX_CTL2'? drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1858:34: note: 'CPT_AF_EXEX_CTL2' declared here reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(e)); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(e)); ^ drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1864:34: note: did you mean 'CPT_AF_EXEX_CTL2'? drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1858:34: note: 'CPT_AF_EXEX_CTL2' declared here reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(e)); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(lf)); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(lf)); ^ drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1896:34: note: did you mean 'CPT_AF_LFX_CTL'? drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1894:34: note: 'CPT_AF_LFX_CTL' declared here reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(lf)); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_PTR_CTL(lf)); ^ drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1898:34: note: did you mean 'CPT_AF_LFX_CTL'? drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1894:34: note: 'CPT_AF_LFX_CTL' declared here reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(lf)); ^ reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0)); ^ reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(0)); ^ reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_LF(0)); ^ drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1926:34: note: did you mean 'CPT_AF_PSNX_EXE'? drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1923:34: note: 'CPT_AF_PSNX_EXE' declared here reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(0)); ^ reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT); ^~~~~~~~~~~~~~ CPT_AF_FLTX_INT drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1920:34: note: 'CPT_AF_FLTX_INT' declared here reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0)); ^ reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT); ^~~~~~~~~~~~~~ CPT_AF_FLTX_INT drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c:1920:34: note: 'CPT_AF_FLTX_INT' declared here reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0)); ^ reg0 = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC); ^ reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC); ^ fatal error: too many errors emitted, stopping now [-ferror-limit=] 20 errors generated. vim +/CPT_AF_CONSTANTS1 +1764 drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c 1749 1750 static int rvu_dbg_cpt_engines_sts_display(struct seq_file *filp, void *unused) 1751 { 1752 u64 busy_sts[2] = {0}, free_sts[2] = {0}; 1753 struct rvu *rvu = filp->private; 1754 u16 max_ses, max_ies, max_aes; 1755 u32 e_min = 0, e_max = 0, e; 1756 int blkaddr; 1757 char *e_type; 1758 u64 reg; 1759 1760 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); 1761 if (blkaddr < 0) 1762 return -ENODEV; 1763 1765 max_ses = reg & 0xffff; 1766 max_ies = (reg >> 16) & 0xffff; 1767 max_aes = (reg >> 32) & 0xffff; 1768 1769 e_type = rvu->rvu_dbg.cpt_ctx.e_type; 1770 1771 if (strcmp(e_type, "SE") == 0) { 1772 e_min = 0; 1773 e_max = max_ses - 1; 1774 } else if (strcmp(e_type, "IE") == 0) { 1775 e_min = max_ses; 1776 e_max = max_ses + max_ies - 1; 1777 } else if (strcmp(e_type, "AE") == 0) { 1778 e_min = max_ses + max_ies; 1779 e_max = max_ses + max_ies + max_aes - 1; 1780 } else if (strcmp(e_type, "all") == 0) { 1781 e_min = 0; 1782 e_max = max_ses + max_ies + max_aes - 1; 1783 } else { 1784 return -EINVAL; 1785 } 1786 1787 for (e = e_min; e <= e_max; e++) { 1789 if (reg & 0x1) { 1790 if (e < max_ses) 1791 busy_sts[0] |= 1ULL << e; 1792 else if (e >= max_ses) 1793 busy_sts[1] |= 1ULL << (e - max_ses); 1794 } 1795 if (reg & 0x2) { 1796 if (e < max_ses) 1797 free_sts[0] |= 1ULL << e; 1798 else if (e >= max_ses) 1799 free_sts[1] |= 1ULL << (e - max_ses); 1800 } 1801 } 1802 seq_printf(filp, "FREE STS : 0x%016llx 0x%016llx\n", free_sts[1], 1803 free_sts[0]); 1804 seq_printf(filp, "BUSY STS : 0x%016llx 0x%016llx\n", busy_sts[1], 1805 busy_sts[0]); 1806 1807 return 0; 1808 } 1809 1810 RVU_DEBUG_SEQ_FOPS(cpt_engines_sts, cpt_engines_sts_display, 1811 cpt_engines_sts_write); 1812 1813 static ssize_t rvu_dbg_cpt_engines_info_write(struct file *filp, 1814 const char __user *buffer, 1815 size_t count, loff_t *ppos) 1816 { 1817 return rvu_dbg_cpt_cmd_parser(filp, buffer, count, ppos); 1818 } 1819 1820 static int rvu_dbg_cpt_engines_info_display(struct seq_file *filp, void *unused) 1821 { 1822 struct rvu *rvu = filp->private; 1823 u16 max_ses, max_ies, max_aes; 1824 u32 e_min, e_max, e; 1825 int blkaddr; 1826 char *e_type; 1827 u64 reg; 1828 1829 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); 1830 if (blkaddr < 0) 1831 return -ENODEV; 1832 1833 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1); 1834 max_ses = reg & 0xffff; 1835 max_ies = (reg >> 16) & 0xffff; 1836 max_aes = (reg >> 32) & 0xffff; 1837 1838 e_type = rvu->rvu_dbg.cpt_ctx.e_type; 1839 1840 if (strcmp(e_type, "SE") == 0) { 1841 e_min = 0; 1842 e_max = max_ses - 1; 1843 } else if (strcmp(e_type, "IE") == 0) { 1844 e_min = max_ses; 1845 e_max = max_ses + max_ies - 1; 1846 } else if (strcmp(e_type, "AE") == 0) { 1847 e_min = max_ses + max_ies; 1848 e_max = max_ses + max_ies + max_aes - 1; 1849 } else if (strcmp(e_type, "all") == 0) { 1850 e_min = 0; 1851 e_max = max_ses + max_ies + max_aes - 1; 1852 } else { 1853 return -EINVAL; 1854 } 1855 1856 seq_puts(filp, "===========================================\n"); 1857 for (e = e_min; e <= e_max; e++) { 1859 seq_printf(filp, "CPT Engine[%u] Group Enable 0x%02llx\n", e, 1860 reg & 0xff); 1862 seq_printf(filp, "CPT Engine[%u] Active Info 0x%llx\n", e, 1863 reg); 1865 seq_printf(filp, "CPT Engine[%u] Control 0x%llx\n", e, 1866 reg); 1867 seq_puts(filp, "===========================================\n"); 1868 } 1869 return 0; 1870 } 1871 1872 RVU_DEBUG_SEQ_FOPS(cpt_engines_info, cpt_engines_info_display, 1873 cpt_engines_info_write); 1874 1875 static int rvu_dbg_cpt_lfs_info_display(struct seq_file *filp, void *unused) 1876 { 1877 struct rvu *rvu = filp->private; 1878 struct rvu_hwinfo *hw = rvu->hw; 1879 struct rvu_block *block; 1880 int blkaddr; 1881 u64 reg; 1882 u32 lf; 1883 1884 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); 1885 if (blkaddr < 0) 1886 return -ENODEV; 1887 1888 block = &hw->block[blkaddr]; 1889 if (!block->lf.bmap) 1890 return -ENODEV; 1891 1892 seq_puts(filp, "===========================================\n"); 1893 for (lf = 0; lf < block->lf.max; lf++) { 1895 seq_printf(filp, "CPT Lf[%u] CTL 0x%llx\n", lf, reg); 1897 seq_printf(filp, "CPT Lf[%u] CTL2 0x%llx\n", lf, reg); 1899 seq_printf(filp, "CPT Lf[%u] PTR_CTL 0x%llx\n", lf, reg); 1900 reg = rvu_read64(rvu, blkaddr, block->lfcfg_reg | 1901 (lf << block->lfshift)); 1902 seq_printf(filp, "CPT Lf[%u] CFG 0x%llx\n", lf, reg); 1903 seq_puts(filp, "===========================================\n"); 1904 } 1905 return 0; 1906 } 1907 1908 RVU_DEBUG_SEQ_FOPS(cpt_lfs_info, cpt_lfs_info_display, NULL); 1909 1910 static int rvu_dbg_cpt_err_info_display(struct seq_file *filp, void *unused) 1911 { 1912 struct rvu *rvu = filp->private; 1913 u64 reg0, reg1; 1914 int blkaddr; 1915 1916 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); 1917 if (blkaddr < 0) 1918 return -ENODEV; 1919 1921 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(1)); 1922 seq_printf(filp, "CPT_AF_FLTX_INT: 0x%llx 0x%llx\n", reg0, reg1); 1924 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(1)); 1925 seq_printf(filp, "CPT_AF_PSNX_EXE: 0x%llx 0x%llx\n", reg0, reg1); 1927 seq_printf(filp, "CPT_AF_PSNX_LF: 0x%llx\n", reg0); 1929 seq_printf(filp, "CPT_AF_RVU_INT: 0x%llx\n", reg0); 1931 seq_printf(filp, "CPT_AF_RAS_INT: 0x%llx\n", reg0); 1933 seq_printf(filp, "CPT_AF_EXE_ERR_INFO: 0x%llx\n", reg0); 1934 1935 return 0; 1936 } 1937 1938 RVU_DEBUG_SEQ_FOPS(cpt_err_info, cpt_err_info_display, NULL); 1939 1940 static int rvu_dbg_cpt_pc_display(struct seq_file *filp, void *unused) 1941 { 1942 struct rvu *rvu; 1943 int blkaddr; 1944 u64 reg; 1945 1946 rvu = filp->private; 1947 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); 1948 if (blkaddr < 0) 1949 return -ENODEV; 1950 1952 seq_printf(filp, "CPT instruction requests %llu\n", reg); 1954 seq_printf(filp, "CPT instruction latency %llu\n", reg); 1956 seq_printf(filp, "CPT NCB read requests %llu\n", reg); 1958 seq_printf(filp, "CPT NCB read latency %llu\n", reg); 1959 reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC); 1960 seq_printf(filp, "CPT read requests caused by UC fills %llu\n", reg); 1961 reg = rvu_read64(rvu, blkaddr, CPT_AF_ACTIVE_CYCLES_PC); 1962 seq_printf(filp, "CPT active cycles pc %llu\n", reg); 1963 reg = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT); 1964 seq_printf(filp, "CPT clock count pc %llu\n", reg); 1965 1966 return 0; 1967 } 1968 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org