tree: https://github.com/atishp04/linux dma_non_coherent_v1 head: 37cdb4f054939f097f3297ec76c1c6738312c577 commit: ad78ee06db98750082ab52e23e4608a3787a3db4 [8/42] gpio: starfive-jh7100: Add StarFive JH7100 GPIO driver config: arc-allyesconfig (attached as .config) compiler: arceb-elf-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/atishp04/linux/commit/ad78ee06db98750082ab52e23e4608a3... git remote add atishp04 https://github.com/atishp04/linux git fetch --no-tags atishp04 dma_non_coherent_v1 git checkout ad78ee06db98750082ab52e23e4608a3787a3db4 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): 332 | void sf_vic_gpio_dout_reverse(int gpio, int en) | ^~~~~~~~~~~~~~~~~~~~~~~~ 351 | void sf_vic_gpio_dout_value(int gpio, int v) | ^~~~~~~~~~~~~~~~~~~~~~ 369 | void sf_vic_gpio_dout_low(int gpio) | ^~~~~~~~~~~~~~~~~~~~ 375 | void sf_vic_gpio_dout_high(int gpio) | ^~~~~~~~~~~~~~~~~~~~~ 381 | void sf_vic_gpio_doen_reverse(int gpio, int en) | ^~~~~~~~~~~~~~~~~~~~~~~~ 400 | void sf_vic_gpio_doen_value(int gpio, int v) | ^~~~~~~~~~~~~~~~~~~~~~ 419 | void sf_vic_gpio_doen_low(int gpio) | ^~~~~~~~~~~~~~~~~~~~ 425 | void sf_vic_gpio_doen_high(int gpio) | ^~~~~~~~~~~~~~~~~~~~~ 431 | void sf_vic_gpio_manual(int offset, int v) | ^~~~~~~~~~~~~~~~~~ vim +/sf_vic_gpio_dout_reverse +332 drivers/gpio/gpio-starfive-jh7100.c 331 333 { 334 unsigned int value; 335 int offset; 336 337 if (!gpio_base) 338 return; 339 340 offset = gpio * 8 + GPIO_DOUT_X_REG; 341 342 spin_lock(&sfg_lock); 343 value = ioread32(gpio_base + offset); 344 value &= ~(0x1 << 31); 345 value |= (en & 0x1) << 31; 346 iowrite32(value, gpio_base + offset); 347 spin_unlock(&sfg_lock); 348 } 349 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_reverse); 350 352 { 353 unsigned int value; 354 int offset; 355 356 if (!gpio_base) 357 return; 358 359 offset = gpio * 8 + GPIO_DOUT_X_REG; 360 spin_lock(&sfg_lock); 361 value = ioread32(gpio_base + offset); 362 value &= ~(0xFF); 363 value |= (v&0xFF); 364 iowrite32(value, gpio_base + offset); 365 spin_unlock(&sfg_lock); 366 } 367 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_value); 368 370 { 371 sf_vic_gpio_dout_value(gpio, 0); 372 } 373 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_low); 374 376 { 377 sf_vic_gpio_dout_value(gpio, 1); 378 } 379 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_high); 380 382 { 383 unsigned int value; 384 int offset; 385 386 if (!gpio_base) 387 return; 388 389 offset = gpio * 8 + GPIO_DOEN_X_REG; 390 391 spin_lock(&sfg_lock); 392 value = ioread32(gpio_base + offset); 393 value &= ~(0x1 << 31); 394 value |= (en & 0x1) << 31; 395 iowrite32(value, gpio_base + offset); 396 spin_unlock(&sfg_lock); 397 } 398 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_reverse); 399 401 { 402 unsigned int value; 403 int offset; 404 405 if (!gpio_base) 406 return; 407 408 offset = gpio * 8 + GPIO_DOEN_X_REG; 409 410 spin_lock(&sfg_lock); 411 value = ioread32(gpio_base + offset); 412 value &= ~(0xFF); 413 value |= (v&0xFF); 414 iowrite32(value, gpio_base + offset); 415 spin_unlock(&sfg_lock); 416 } 417 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_value); 418 420 { 421 sf_vic_gpio_doen_value(gpio, 0); 422 } 423 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_low); 424 426 { 427 sf_vic_gpio_doen_value(gpio, 1); 428 } 429 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_high); 430 432 { 433 unsigned int value; 434 435 if (!gpio_base) 436 return; 437 438 spin_lock(&sfg_lock); 439 value = ioread32(gpio_base + offset); 440 value &= ~(0xFF); 441 value |= (v&0xFF); 442 iowrite32(value, gpio_base + offset); 443 spin_unlock(&sfg_lock); 444 } 445 EXPORT_SYMBOL_GPL(sf_vic_gpio_manual); 446 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org