Hi Li,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v5.9-rc2 next-20200824]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Li-Jun/dt-bindings-phy-imx8mq-us...
base:
https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-randconfig-r024-20200824 (attached as .config)
compiler: clang version 12.0.0 (
https://github.com/llvm/llvm-project
b587ca93be114d07ec3bf654add97d7872325281)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
> drivers/phy/freescale/phy-fsl-imx8mq-usb.c:74:11: error: implicit
declaration of function 'FIELD_PREP' [-Werror,-Wimplicit-function-declaration]
value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
^
1 error generated.
#
https://github.com/0day-ci/linux/commit/e9388d5c8e328a7be2ffe214e8c6a5d51...
git remote add linux-review
https://github.com/0day-ci/linux
git fetch --no-tags linux-review
Li-Jun/dt-bindings-phy-imx8mq-usb-add-compatible-string-for-imx8mp-usb-phy/20200824-144136
git checkout e9388d5c8e328a7be2ffe214e8c6a5d510eecf1c
vim +/FIELD_PREP +74 drivers/phy/freescale/phy-fsl-imx8mq-usb.c
65
66 static int imx8mp_usb_phy_init(struct phy *phy)
67 {
68 struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
69 u32 value;
70
71 /* USB3.0 PHY signal fsel for 24M ref */
72 value = readl(imx_phy->base + PHY_CTRL0);
73 value &= ~PHY_CTRL0_FSEL_MASK;
74 value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
75 writel(value, imx_phy->base + PHY_CTRL0);
76
77 /* Disable alt_clk_en and use internal MPLL clocks */
78 value = readl(imx_phy->base + PHY_CTRL6);
79 value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
80 writel(value, imx_phy->base + PHY_CTRL6);
81
82 value = readl(imx_phy->base + PHY_CTRL1);
83 value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
84 value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
85 writel(value, imx_phy->base + PHY_CTRL1);
86
87 value = readl(imx_phy->base + PHY_CTRL0);
88 value |= PHY_CTRL0_REF_SSP_EN;
89 writel(value, imx_phy->base + PHY_CTRL0);
90
91 value = readl(imx_phy->base + PHY_CTRL2);
92 value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
93 writel(value, imx_phy->base + PHY_CTRL2);
94
95 udelay(10);
96
97 value = readl(imx_phy->base + PHY_CTRL1);
98 value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
99 writel(value, imx_phy->base + PHY_CTRL1);
100
101 return 0;
102 }
103
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org