tree:
https://chromium.googlesource.com/chromiumos/third_party/kernel chromeos-5.10
head: 2be994c1bc8af2595853df3b93e55eb46357bf4f
commit: c0b118f37e5d5f20ae8369c124961e39087075c8 [9126/11292] UPSTREAM:
drm/nouveau/mc/tu102: Fix MMU fault interrupts on Turing
config: parisc-randconfig-r034-20210513 (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
git remote add chrome-os
https://chromium.googlesource.com/chromiumos/third_party/kernel
git fetch --no-tags chrome-os chromeos-5.10
git checkout c0b118f37e5d5f20ae8369c124961e39087075c8
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=parisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
> drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:50:1: error: no
previous prototype for 'tu102_mc_intr_unarm' [-Werror=missing-prototypes]
50 | tu102_mc_intr_unarm(struct nvkm_mc *base)
| ^~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:62:1: error: no
previous prototype for 'tu102_mc_intr_rearm' [-Werror=missing-prototypes]
62 | tu102_mc_intr_rearm(struct nvkm_mc *base)
| ^~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:74:1: error: no
previous prototype for 'tu102_mc_intr_mask' [-Werror=missing-prototypes]
74 | tu102_mc_intr_mask(struct nvkm_mc *base, u32 mask, u32 intr)
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:132:1: error: no previous prototype for
'tu102_mc_new_' [-Werror=missing-prototypes]
132 | tu102_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
| ^~~~~~~~~~~~~
cc1: all warnings being treated as errors
vim +/tu102_mc_intr_unarm +50 drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c
48
49 void
50 tu102_mc_intr_unarm(struct nvkm_mc *base)
51 {
52 struct tu102_mc *mc = tu102_mc(base);
53 unsigned long flags;
54
55 spin_lock_irqsave(&mc->lock, flags);
56 mc->intr = false;
57 tu102_mc_intr_update(mc);
58 spin_unlock_irqrestore(&mc->lock, flags);
59 }
60
61 void
62 tu102_mc_intr_rearm(struct nvkm_mc *base)
63 {
64 struct tu102_mc *mc = tu102_mc(base);
65 unsigned long flags;
66
67 spin_lock_irqsave(&mc->lock, flags);
68 mc->intr = true;
69 tu102_mc_intr_update(mc);
70 spin_unlock_irqrestore(&mc->lock, flags);
71 }
72
73 void
74 tu102_mc_intr_mask(struct nvkm_mc *base, u32 mask, u32 intr)
75 {
76 struct tu102_mc *mc = tu102_mc(base);
77 unsigned long flags;
78
79 spin_lock_irqsave(&mc->lock, flags);
80 mc->mask = (mc->mask & ~mask) | intr;
81 tu102_mc_intr_update(mc);
82 spin_unlock_irqrestore(&mc->lock, flags);
83 }
84
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org