tree:
https://chromium.googlesource.com/chromiumos/third_party/kernel chromeos-5.4
head: 73cdf293503d84ee122c0d7e360c5eb0d594c051
commit: dc8070310769ab1bb78dc66a1f7435fd64dc39ca [73/74] CHROMIUM: WA: ASoC: SOF: Intel:
Do not enable D0i3 work
config: arc-allyesconfig (attached as .config)
compiler: arceb-elf-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
git remote add chrome-os
https://chromium.googlesource.com/chromiumos/third_party/kernel
git fetch --no-tags chrome-os chromeos-5.4
git checkout dc8070310769ab1bb78dc66a1f7435fd64dc39ca
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
sound/soc/sof/intel/cnl.c: In function 'cnl_ipc_send_msg':
> sound/soc/sof/intel/cnl.c:169:26: warning: variable 'hdr'
set but not used [-Wunused-but-set-variable]
169 | struct sof_ipc_cmd_hdr
*hdr;
| ^~~
sound/soc/sof/intel/cnl.c:168:28: warning: unused variable 'hdev'
[-Wunused-variable]
168 | struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
| ^~~~
vim +/hdr +169 sound/soc/sof/intel/cnl.c
186198347be755 Keyon Jie 2019-10-25 165
47bf66a5e72ba1 Ranjani Sridharan 2020-08-26 166 int cnl_ipc_send_msg(struct snd_sof_dev
*sdev, struct snd_sof_ipc_msg *msg)
273020522ef623 Liam Girdwood 2019-04-12 167 {
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 168 struct sof_intel_hda_dev *hdev =
sdev->pdata->hw_pdata;
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 @169 struct sof_ipc_cmd_hdr *hdr;
186198347be755 Keyon Jie 2019-10-25 170 u32 dr = 0;
186198347be755 Keyon Jie 2019-10-25 171 u32 dd = 0;
186198347be755 Keyon Jie 2019-10-25 172
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 173 /*
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 174 * Currently the only compact IPC
supported is the PM_GATE
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 175 * IPC which is used for transitioning
the DSP between the
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 176 * D0I0 and D0I3 states. And these are
sent only during the
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 177 * set_power_state() op. Therefore,
there will never be a case
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 178 * that a compact IPC results in the
DSP exiting D0I3 without
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 179 * the host and FW being in sync.
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 180 */
186198347be755 Keyon Jie 2019-10-25 181 if (cnl_compact_ipc_compress(msg,
&dr, &dd)) {
186198347be755 Keyon Jie 2019-10-25 182 /* send the message via IPC registers
*/
186198347be755 Keyon Jie 2019-10-25 183 snd_sof_dsp_write(sdev, HDA_DSP_BAR,
CNL_DSP_REG_HIPCIDD,
186198347be755 Keyon Jie 2019-10-25 184 dd);
186198347be755 Keyon Jie 2019-10-25 185 snd_sof_dsp_write(sdev, HDA_DSP_BAR,
CNL_DSP_REG_HIPCIDR,
186198347be755 Keyon Jie 2019-10-25 186 CNL_DSP_REG_HIPCIDR_BUSY | dr);
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 187 return 0;
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 188 }
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 189
186198347be755 Keyon Jie 2019-10-25 190 /* send the message via mailbox */
273020522ef623 Liam Girdwood 2019-04-12 191 sof_mailbox_write(sdev,
sdev->host_box.offset, msg->msg_data,
273020522ef623 Liam Girdwood 2019-04-12 192 msg->msg_size);
273020522ef623 Liam Girdwood 2019-04-12 193 snd_sof_dsp_write(sdev, HDA_DSP_BAR,
CNL_DSP_REG_HIPCIDR,
6fbbc18ead0f4f Daniel Baluta 2019-06-03 194 CNL_DSP_REG_HIPCIDR_BUSY);
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 195
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 196 hdr = msg->msg_data;
35bc77bfc585f8 Ranjani Sridharan 2020-01-29 197
273020522ef623 Liam Girdwood 2019-04-12 198 return 0;
273020522ef623 Liam Girdwood 2019-04-12 199 }
273020522ef623 Liam Girdwood 2019-04-12 200
:::::: The code at line 169 was first introduced by commit
:::::: 35bc77bfc585f82e90c52e6d1dccef301035ecb5 FROMGIT: ASoC: SOF: Intel: cnl: Implement
feature to support DSP D0i3 in S0
:::::: TO: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com>
:::::: CC: Commit Bot <commit-bot(a)chromium.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org