Hi Jeffrey, [FYI, it's a private test report for your RFC patch.] [auto build test ERROR on char-misc/char-misc-testing] [also build test ERROR on soc/for-next linus/master v5.7-rc6 next-20200519] [cannot apply to linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Jeffrey-Hugo/Qualcomm-Cloud-AI-1... base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git 57c76221d5af648c8355a55c09b050c5d8d38189 config: x86_64-randconfig-r022-20200519 (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 135b877874fae96b4372c8a3fbfaa8ff44ff86e3) reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>, old ones prefixed by <<): mhi_cntl->link_status = mhi_link_status; ~~~~~~~~ ^ 1 error generated. vim +457 drivers/misc/qaic/mhi_controller.c 430 431 struct mhi_controller *qaic_mhi_register_controller(struct pci_dev *pci_dev, 432 void __iomem *mhi_bar, 433 int mhi_irq) 434 { 435 struct mhi_controller *mhi_cntl; 436 int ret; 437 438 pci_dbg(pci_dev, "%s\n", __func__); 439 440 mhi_cntl = kzalloc(sizeof(*mhi_cntl), GFP_KERNEL); 441 if (!mhi_cntl) 442 return ERR_PTR(-ENOMEM); 443 444 mhi_cntl->cntrl_dev = &pci_dev->dev; 445 446 /* 447 * Covers the entire possible physical ram region. Remote side is 448 * going to calculate a size of this range, so subtract 1 to prevent 449 * rollover. 450 */ 451 mhi_cntl->iova_start = 0; 452 mhi_cntl->iova_stop = PHYS_ADDR_MAX - 1; 453 454 mhi_cntl->status_cb = mhi_status_cb; 455 mhi_cntl->runtime_get = mhi_runtime_get; 456 mhi_cntl->runtime_put = mhi_runtime_put; 458 mhi_cntl->regs = mhi_bar; 459 mhi_cntl->nr_irqs = 1; 460 mhi_cntl->irq = kmalloc(sizeof(*mhi_cntl->irq), GFP_KERNEL); 461 462 if (!mhi_cntl->irq) 463 return ERR_PTR(-ENOMEM); 464 465 mhi_cntl->irq[0] = mhi_irq; 466 467 mhi_cntl->fw_image = "qcom/aic100/sbl.bin"; 468 469 /* use latest configured timeout */ 470 aic100_config.timeout_ms = mhi_timeout; 471 ret = mhi_register_controller(mhi_cntl, &aic100_config); 472 if (ret) { 473 pci_err(pci_dev, "register_mhi_controller failed %d\n", ret); 474 kfree(mhi_cntl->irq); 475 kfree(mhi_cntl); 476 return ERR_PTR(ret); 477 } 478 479 ret = mhi_async_power_up(mhi_cntl); 480 if (ret) { 481 pci_err(pci_dev, "mhi_async_power_up failed %d\n", ret); 482 mhi_unregister_controller(mhi_cntl); 483 kfree(mhi_cntl->irq); 484 kfree(mhi_cntl); 485 return ERR_PTR(ret); 486 } 487 488 return mhi_cntl; 489 } 490 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org