Hi Zhang,
FYI, the error/warning still remains.
tree:
https://github.com/Freescale/linux-fslc 5.10-2.1.x-imx
head: 3b81a70be1099d44fdafaa6766bf75a2bd9e297e
commit: b8f017dd505c9a64b8a1a1cd39f829d2c3178a15 [13017/15242] LF-4230-1: ASoC: SOF:
Support SOF on 8ULP platform
config: ia64-allyesconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/Freescale/linux-fslc/commit/b8f017dd505c9a64b8a1a1cd39...
git remote add freescale-fslc
https://github.com/Freescale/linux-fslc
git fetch --no-tags freescale-fslc 5.10-2.1.x-imx
git checkout b8f017dd505c9a64b8a1a1cd39f829d2c3178a15
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=ia64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
sound/soc/sof/imx/imx8ulp.c:80:5: warning: no previous prototype for
'imx8ulp_configure_sim_lpav' [-Wmissing-prototypes]
80 | int imx8ulp_configure_sim_lpav(struct imx8ulp_priv *priv)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c: In function 'imx8ulp_reset':
> sound/soc/sof/imx/imx8ulp.c:277:9: error: implicit declaration of
function 'arm_smccc_smc' [-Werror=implicit-function-declaration]
277 |
arm_smccc_smc(FSL_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &smc_resource);
| ^~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c: At top level:
sound/soc/sof/imx/imx8ulp.c:435:5: warning: no previous prototype for
'imx8ulp_suspend' [-Wmissing-prototypes]
435 | int imx8ulp_suspend(struct snd_sof_dev *sdev)
| ^~~~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:448:5: warning: no previous prototype for
'imx8ulp_resume' [-Wmissing-prototypes]
448 | int imx8ulp_resume(struct snd_sof_dev *sdev)
| ^~~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:461:5: warning: no previous prototype for
'imx8ulp_dsp_runtime_resume' [-Wmissing-prototypes]
461 | int imx8ulp_dsp_runtime_resume(struct snd_sof_dev *sdev)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:473:5: warning: no previous prototype for
'imx8ulp_dsp_runtime_suspend' [-Wmissing-prototypes]
473 | int imx8ulp_dsp_runtime_suspend(struct snd_sof_dev *sdev)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:486:5: warning: no previous prototype for
'imx8ulp_dsp_suspend' [-Wmissing-prototypes]
486 | int imx8ulp_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state)
| ^~~~~~~~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:499:5: warning: no previous prototype for
'imx8ulp_dsp_resume' [-Wmissing-prototypes]
499 | int imx8ulp_dsp_resume(struct snd_sof_dev *sdev)
| ^~~~~~~~~~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:533:5: warning: no previous prototype for
'imx8ulp_dsp_set_power_state' [-Wmissing-prototypes]
533 | int imx8ulp_dsp_set_power_state(struct snd_sof_dev *sdev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from include/sound/asound.h:24,
from include/sound/pcm.h:11,
from include/sound/soc.h:23,
from include/sound/sof.h:15,
from sound/soc/sof/imx/imx8ulp.c:19:
include/uapi/sound/asound.h:281:41: warning: initialized field overwritten
[-Woverride-init]
281 | #define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports
mmap */
| ^~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:601:25: note: in expansion of macro
'SNDRV_PCM_INFO_MMAP'
601 | .hw_info = SNDRV_PCM_INFO_MMAP |
| ^~~~~~~~~~~~~~~~~~~
include/uapi/sound/asound.h:281:41: note: (near initialization for
'sof_imx8ulp_ops.hw_info')
281 | #define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports
mmap */
| ^~~~~~~~~~
sound/soc/sof/imx/imx8ulp.c:601:25: note: in expansion of macro
'SNDRV_PCM_INFO_MMAP'
601 | .hw_info = SNDRV_PCM_INFO_MMAP |
| ^~~~~~~~~~~~~~~~~~~
> sound/soc/sof/imx/imx8ulp.c:31:22: error: storage size of
'smc_resource' isn't known
31 | struct arm_smccc_res
smc_resource;
| ^~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +/arm_smccc_smc +277 sound/soc/sof/imx/imx8ulp.c
78
79 /* System integration module(SIM) control dsp configurtion */
80 int imx8ulp_configure_sim_lpav(struct imx8ulp_priv *priv)
81 {
82 priv->regmap_sim =
syscon_regmap_lookup_by_compatible("nxp,imx8ulp-avd-sim");
83 if (IS_ERR(priv->regmap_sim))
84 return -EPROBE_DEFER;
85 return 0;
86 }
87
88 static void imx8ulp_sim_lpav_start(struct imx8ulp_priv *priv)
89 {
90 /* Controls the HiFi4 DSP Reset: 1 in reset, 0 out of reset */
91 regmap_update_bits(priv->regmap_sim, SYSCTRL0, RESET_BIT, 0);
92 /* Reset HiFi4 DSP Debug logic: 1 reset, 0 not set */
93 regmap_update_bits(priv->regmap_sim, SYSCTRL0, DEBUG_LOGIC_BIT, 0);
94 /* Stall HIFI4 DSP Execution: 1 stall, 0 not stall */
95 regmap_update_bits(priv->regmap_sim, SYSCTRL0, EXECUTE_BIT, 0);
96 }
97
98 static int imx8ulp_init_clocks(struct snd_sof_dev *sdev)
99 {
100 int i;
101 struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata;
102
103 for (i = 0; i < IMX8ULP_DSP_CLK_NUM; i++) {
104 priv->dsp_clks[i] = devm_clk_get(priv->dev, imx8ulp_dsp_clks_names[i]);
105 if (IS_ERR(priv->dsp_clks[i]))
106 return PTR_ERR(priv->dsp_clks[i]);
107 }
108
109 for (i = 0; i < IMX8ULP_DAI_CLK_NUM; i++)
110 priv->dai_clks[i] = devm_clk_get_optional(priv->dev,
imx8ulp_dai_clks_names[i]);
111
112 return 0;
113 }
114
115 static int imx8ulp_prepare_clocks(struct snd_sof_dev *sdev)
116 {
117 int i, j, ret;
118 struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata;
119
120 for (i = 0; i < IMX8ULP_DSP_CLK_NUM; i++) {
121 ret = clk_prepare_enable(priv->dsp_clks[i]);
122 if (ret < 0) {
123 dev_err(priv->dev, "Failed to enable clk %s\n",
124 imx8ulp_dsp_clks_names[i]);
125 goto err_dsp_clks;
126 }
127 }
128
129 for (j = 0; j < IMX8ULP_DAI_CLK_NUM; j++) {
130 ret = clk_prepare_enable(priv->dai_clks[j]);
131 if (ret < 0) {
132 dev_err(priv->dev, "Failed to enable clk %s\n",
133 imx8ulp_dai_clks_names[j]);
134 goto err_dai_clks;
135 }
136 }
137
138 return 0;
139
140 err_dai_clks:
141 while (--j >= 0)
142 clk_disable_unprepare(priv->dai_clks[j]);
143
144 err_dsp_clks:
145 while (--i >= 0)
146 clk_disable_unprepare(priv->dsp_clks[i]);
147
148 return ret;
149 }
150
151 static void imx8ulp_disable_clocks(struct snd_sof_dev *sdev)
152 {
153 int i;
154 struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata;
155
156 for (i = 0; i < IMX8ULP_DSP_CLK_NUM; i++)
157 clk_disable_unprepare(priv->dsp_clks[i]);
158
159 for (i = 0; i < IMX8ULP_DAI_CLK_NUM; i++)
160 clk_disable_unprepare(priv->dai_clks[i]);
161 }
162
163 static void imx8ulp_get_reply(struct snd_sof_dev *sdev)
164 {
165 struct snd_sof_ipc_msg *msg = sdev->msg;
166 struct sof_ipc_reply reply;
167 int ret = 0;
168
169 if (!msg) {
170 dev_warn(sdev->dev, "unexpected ipc interrupt\n");
171 return;
172 }
173
174 /* get reply */
175 sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply));
176
177 if (reply.error < 0) {
178 memcpy(msg->reply_data, &reply, sizeof(reply));
179 ret = reply.error;
180 } else {
181 /* reply has correct size? */
182 if (reply.hdr.size != msg->reply_size) {
183 dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n",
184 msg->reply_size, reply.hdr.size);
185 ret = -EINVAL;
186 }
187
188 /* read the message */
189 if (msg->reply_size > 0)
190 sof_mailbox_read(sdev, sdev->host_box.offset,
191 msg->reply_data, msg->reply_size);
192 }
193
194 msg->reply_error = ret;
195 }
196
197 static int imx8ulp_get_mailbox_offset(struct snd_sof_dev *sdev)
198 {
199 return MBOX_OFFSET;
200 }
201
202 static int imx8ulp_get_window_offset(struct snd_sof_dev *sdev, u32 id)
203 {
204 return MBOX_OFFSET;
205 }
206
207 static void imx8ulp_dsp_handle_reply(struct imx_dsp_ipc *ipc)
208 {
209 struct imx8ulp_priv *priv = imx_dsp_get_data(ipc);
210 unsigned long flags;
211
212 spin_lock_irqsave(&priv->sdev->ipc_lock, flags);
213
214 imx8ulp_get_reply(priv->sdev);
215 snd_sof_ipc_reply(priv->sdev, 0);
216 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags);
217 }
218
219 static void imx8ulp_dsp_handle_request(struct imx_dsp_ipc *ipc)
220 {
221 struct imx8ulp_priv *priv = imx_dsp_get_data(ipc);
222 u32 p; /* panic code */
223
224 /* Read the message from the debug box. */
225 sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p,
sizeof(p));
226
227 /* Check to see if the message is a panic code (0x0dead***) */
228 if ((p & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC)
229 snd_sof_dsp_panic(priv->sdev, p);
230 else
231 snd_sof_ipc_msgs_rx(priv->sdev);
232 }
233
234 static struct imx_dsp_ops dsp_ops = {
235 .handle_reply = imx8ulp_dsp_handle_reply,
236 .handle_request = imx8ulp_dsp_handle_request,
237 };
238
239 static int imx8ulp_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
240 {
241 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
242
243 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data,
244 msg->msg_size);
245 imx_dsp_ring_doorbell(priv->dsp_ipc, 0);
246
247 return 0;
248 }
249
250 /* config sc firmware */
251 static int imx8ulp_run(struct snd_sof_dev *sdev)
252 {
253 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
254
255 imx8ulp_sim_lpav_start(priv);
256
257 return 0;
258 }
259
260 static int imx8ulp_reset(struct snd_sof_dev *sdev)
261 {
262 struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
263
264 /* HiFi4 Platform Clock Enable: 1 enabled, 0 disabled */
265 regmap_update_bits(priv->regmap_sim, SYSCTRL0, PLAT_CLK_BIT, PLAT_CLK_BIT);
266 /* HiFi4 PBCLK clock enable: 1 enabled, 0 disabled */
267 regmap_update_bits(priv->regmap_sim, SYSCTRL0, PB_CLK_BIT, PB_CLK_BIT);
268 /* HiFi4 Clock Enable: 1 enabled, 0 disabled */
269 regmap_update_bits(priv->regmap_sim, SYSCTRL0, HIFI4_CLK_BIT, HIFI4_CLK_BIT);
270
271 regmap_update_bits(priv->regmap_sim, SYSCTRL0, RESET_BIT, RESET_BIT);
272 usleep_range(1, 2);
273 /* Stall HIFI4 DSP Execution: 1 stall, 0 not stall */
274 regmap_update_bits(priv->regmap_sim, SYSCTRL0, EXECUTE_BIT, EXECUTE_BIT);
275 usleep_range(1, 2);
276
277 arm_smccc_smc(FSL_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0,
&smc_resource);
278
279 return 0;
280 }
281
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org