tree: https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git perf/cgroup head: acc643af6b1a6dc7a95992b54f2649aa01c7b1a6 commit: 7b9307ef630df997ef91f0076a19085ae1b7af5e [2/12] perf_event: Add support for LSM and SELinux checks config: powerpc-defconfig (attached as .config) compiler: powerpc64-linux-gcc (GCC) 7.4.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 7b9307ef630df997ef91f0076a19085ae1b7af5e # save the attached .config to linux build tree GCC_VERSION=7.4.0 make.cross ARCH=powerpc If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): In file included from include/linux/perf_event.h:59:0, from arch/powerpc/perf/core-book3s.c:10: include/linux/security.h: In function 'security_perf_event_free': include/linux/security.h:1920:9: error: 'return' with a value, in function returning void [-Werror] return 0; ^ include/linux/security.h:1918:20: note: declared here static inline void security_perf_event_free(struct perf_event *event) ^~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/perf/core-book3s.c: In function 'perf_get_data_addr': if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN) && ^~~~~~~~~~~~~~~~~~~~ perf_allow_kernel cc1: all warnings being treated as errors vim +207 arch/powerpc/perf/core-book3s.c cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 @10 #include <linux/perf_event.h> 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 11 #include <linux/percpu.h> 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 12 #include <linux/hardirq.h> 691231846cebfe arch/powerpc/perf/core-book3s.c Michael Neuling 2013-05-13 13 #include <linux/uaccess.h> 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 14 #include <asm/reg.h> 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 15 #include <asm/pmc.h> 01d0287f068de2 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-14 16 #include <asm/machdep.h> 0475f9ea8e2cc0 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-11 17 #include <asm/firmware.h> 0bbd0d4be8d5d3 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-05-14 18 #include <asm/ptrace.h> 691231846cebfe arch/powerpc/perf/core-book3s.c Michael Neuling 2013-05-13 19 #include <asm/code-patching.h> 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 20 708597daf23486 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2019-04-04 21 #ifdef CONFIG_PPC64 708597daf23486 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2019-04-04 22 #include "internal.h" 708597daf23486 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2019-04-04 23 #endif 708597daf23486 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2019-04-04 24 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 25 #define BHRB_MAX_ENTRIES 32 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 26 #define BHRB_TARGET 0x0000000000000002 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 27 #define BHRB_PREDICTION 0x0000000000000001 b0d436c739b0d4 arch/powerpc/perf/core-book3s.c Anton Blanchard 2013-08-07 28 #define BHRB_EA 0xFFFFFFFFFFFFFFFCUL 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 29 cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 30 struct cpu_hw_events { cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 31 int n_events; 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 32 int n_percpu; 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 33 int disabled; 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 34 int n_added; ab7ef2e50a557a arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-04-29 35 int n_limited; ab7ef2e50a557a arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-04-29 36 u8 pmcs_enabled; cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 37 struct perf_event *event[MAX_HWEVENTS]; cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 38 u64 events[MAX_HWEVENTS]; cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 39 unsigned int flags[MAX_HWEVENTS]; 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 40 /* 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 41 * The order of the MMCR array is: 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 42 * - 64-bit, MMCR0, MMCR1, MMCRA, MMCR2 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 43 * - 32-bit, MMCR0, MMCR1, MMCR2 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 44 */ 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 45 unsigned long mmcr[4]; a8f90e906783f1 arch/powerpc/kernel/perf_event.c Paul Mackerras 2009-09-22 46 struct perf_event *limited_counter[MAX_LIMITED_HWCOUNTERS]; a8f90e906783f1 arch/powerpc/kernel/perf_event.c Paul Mackerras 2009-09-22 47 u8 limited_hwidx[MAX_LIMITED_HWCOUNTERS]; cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 48 u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES]; cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 49 unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES]; cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 50 unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES]; 8e6d5573af5543 arch/powerpc/kernel/perf_event.c Lin Ming 2010-05-08 51 fbbe0701158199 arch/powerpc/perf/core-book3s.c Sukadev Bhattiprolu 2015-09-03 52 unsigned int txn_flags; 8e6d5573af5543 arch/powerpc/kernel/perf_event.c Lin Ming 2010-05-08 53 int n_txn_start; 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 54 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 55 /* BHRB bits */ 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 56 u64 bhrb_filter; /* BHRB HW branch filter */ f0322f7f1e2165 arch/powerpc/perf/core-book3s.c Anshuman Khandual 2015-06-30 57 unsigned int bhrb_users; 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 58 void *bhrb_context; 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 59 struct perf_branch_stack bhrb_stack; 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 60 struct perf_branch_entry bhrb_entries[BHRB_MAX_ENTRIES]; 356d8ce3d0a4a1 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2017-02-12 61 u64 ic_init; 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 62 }; 3925f46bb5902b arch/powerpc/perf/core-book3s.c Anshuman Khandual 2013-04-22 63 e51df2c170efae arch/powerpc/perf/core-book3s.c Anton Blanchard 2014-08-20 64 static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 65 e51df2c170efae arch/powerpc/perf/core-book3s.c Anton Blanchard 2014-08-20 66 static struct power_pmu *ppmu; 4574910e508708 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-01-09 67 d095cd46dac104 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-23 68 /* 57c0c15b524432 arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 69 * Normally, to ignore kernel events we set the FCS (freeze counters d095cd46dac104 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-23 70 * in supervisor mode) bit in MMCR0, but if the kernel runs with the d095cd46dac104 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-23 71 * hypervisor bit set in the MSR, or if we are running on a processor d095cd46dac104 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-23 72 * where the hypervisor bit is forced to 1 (as on Apple G5 processors), d095cd46dac104 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-23 73 * then we need to use the FCHV bit to ignore kernel events. d095cd46dac104 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-23 74 */ cdd6c482c9ff9c arch/powerpc/kernel/perf_event.c Ingo Molnar 2009-09-21 75 static unsigned int freeze_events_kernel = MMCR0_FCS; d095cd46dac104 arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-02-23 76 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 77 /* 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 78 * 32-bit doesn't have MMCRA but does have an MMCR2, 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 79 * and a few other names are different. 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 80 */ 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 81 #ifdef CONFIG_PPC32 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 82 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 83 #define MMCR0_FCHV 0 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 84 #define MMCR0_PMCjCE MMCR0_PMCnCE 7a7a41f9d5b28a arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 85 #define MMCR0_FC56 0 378a6ee99e4a43 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 86 #define MMCR0_PMAO 0 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 87 #define MMCR0_EBE 0 76cb8a783a4b74 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-03-14 88 #define MMCR0_BHRBA 0 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 89 #define MMCR0_PMCC 0 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 90 #define MMCR0_PMCC_U6 0 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 91 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 92 #define SPRN_MMCRA SPRN_MMCR2 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 93 #define MMCRA_SAMPLE_ENABLE 0 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 94 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 95 static inline unsigned long perf_ip_adjust(struct pt_regs *regs) 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 96 { 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 97 return 0; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 98 } 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 99 static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) { } 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 100 static inline u32 perf_get_misc_flags(struct pt_regs *regs) 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 101 { 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 102 return 0; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 103 } 75382aa72f0682 arch/powerpc/perf/core-book3s.c Anton Blanchard 2012-06-26 104 static inline void perf_read_regs(struct pt_regs *regs) 75382aa72f0682 arch/powerpc/perf/core-book3s.c Anton Blanchard 2012-06-26 105 { 75382aa72f0682 arch/powerpc/perf/core-book3s.c Anton Blanchard 2012-06-26 106 regs->result = 0; 75382aa72f0682 arch/powerpc/perf/core-book3s.c Anton Blanchard 2012-06-26 107 } 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 108 static inline int perf_intr_is_nmi(struct pt_regs *regs) 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 109 { 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 110 return 0; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 111 } 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 112 e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 113 static inline int siar_valid(struct pt_regs *regs) e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 114 { e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 115 return 1; e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 116 } e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 117 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 118 static bool is_ebb_event(struct perf_event *event) { return false; } 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 119 static int ebb_event_check(struct perf_event *event) { return 0; } 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 120 static void ebb_event_add(struct perf_event *event) { } 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 121 static void ebb_switch_out(unsigned long mmcr0) { } 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 122 static unsigned long ebb_switch_in(bool ebb, struct cpu_hw_events *cpuhw) 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 123 { 9de5cb0f6df832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-07-23 124 return cpuhw->mmcr[0]; 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 125 } 330a1eb7775ba8 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-06-28 126 d52f2dc40b5220 arch/powerpc/perf/core-book3s.c Michael Neuling 2013-05-13 127 static inline void power_pmu_bhrb_enable(struct perf_event *event) {} d52f2dc40b5220 arch/powerpc/perf/core-book3s.c Michael Neuling 2013-05-13 128 static inline void power_pmu_bhrb_disable(struct perf_event *event) {} acba3c7e4652ca arch/powerpc/perf/core-book3s.c Peter Zijlstra 2015-01-14 129 static void power_pmu_sched_task(struct perf_event_context *ctx, bool sched_in) {} d52f2dc40b5220 arch/powerpc/perf/core-book3s.c Michael Neuling 2013-05-13 130 static inline void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw) {} c2e37a2626a747 arch/powerpc/perf/core-book3s.c Michael Ellerman 2014-03-14 131 static void pmao_restore_workaround(bool ebb) { } 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 132 #endif /* CONFIG_PPC32 */ 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 133 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 134 bool is_sier_available(void) 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 135 { 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 136 if (ppmu->flags & PPMU_HAS_SIER) 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 137 return true; 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 138 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 139 return false; 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 140 } 333804dc3b7a92 arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-12-09 141 33904054b40832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 142 static bool regs_use_siar(struct pt_regs *regs) 33904054b40832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 143 { 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 144 /* 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 145 * When we take a performance monitor exception the regs are setup 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 146 * using perf_read_regs() which overloads some fields, in particular 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 147 * regs->result to tell us whether to use SIAR. 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 148 * 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 149 * However if the regs are from another exception, eg. a syscall, then 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 150 * they have not been setup using perf_read_regs() and so regs->result 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 151 * is something random. 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 152 */ 72e349f1124a11 arch/powerpc/perf/core-book3s.c Anton Blanchard 2015-05-26 153 return ((TRAP(regs) == 0xf00) && regs->result); 33904054b40832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 154 } 33904054b40832 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 155 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 156 /* 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 157 * Things that are specific to 64-bit implementations. 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 158 */ 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 159 #ifdef CONFIG_PPC64 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 160 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 161 static inline unsigned long perf_ip_adjust(struct pt_regs *regs) 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 162 { 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 163 unsigned long mmcra = regs->dsisr; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 164 7a7868326d7741 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 165 if ((ppmu->flags & PPMU_HAS_SSLOT) && (mmcra & MMCRA_SAMPLE_ENABLE)) { 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 166 unsigned long slot = (mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 167 if (slot > 1) 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 168 return 4 * (slot - 1); 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 169 } 7a7868326d7741 arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-04-25 170 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 171 return 0; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 172 } 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 173 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 174 /* 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 175 * The user wants a data address recorded. 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 176 * If we're not doing instruction sampling, give them the SDAR 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 177 * (sampled data address). If we are doing instruction sampling, then 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 178 * only give them the SDAR if it corresponds to the instruction 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 179 * pointed to by SIAR; this is indicated by the [POWER6_]MMCRA_SDSYNC, the 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 180 * [POWER7P_]MMCRA_SDAR_VALID bit in MMCRA, or the SDAR_VALID bit in SIER. 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 181 */ 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 182 static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 183 { 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 184 unsigned long mmcra = regs->dsisr; 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 185 bool sdar_valid; 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 186 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 187 if (ppmu->flags & PPMU_HAS_SIER) 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 188 sdar_valid = regs->dar & SIER_SDAR_VALID; 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 189 else { e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 190 unsigned long sdsync; e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 191 e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 192 if (ppmu->flags & PPMU_SIAR_VALID) e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 193 sdsync = POWER7P_MMCRA_SDAR_VALID; e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 194 else if (ppmu->flags & PPMU_ALT_SIPR) e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 195 sdsync = POWER6_MMCRA_SDSYNC; f04d108029063a arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2017-02-20 196 else if (ppmu->flags & PPMU_NO_SIAR) f04d108029063a arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2017-02-20 197 sdsync = MMCRA_SAMPLE_ENABLE; e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 198 else e6878835ac4794 arch/powerpc/perf/core-book3s.c sukadev(a)linux.vnet.ibm.com 2012-09-18 199 sdsync = MMCRA_SDSYNC; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 200 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 201 sdar_valid = mmcra & sdsync; 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 202 } 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 203 58a032c3b106ad arch/powerpc/perf/core-book3s.c Michael Ellerman 2013-05-15 204 if (!(mmcra & MMCRA_SAMPLE_ENABLE) || sdar_valid) 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 205 *addrp = mfspr(SPRN_SDAR); cd1231d7035fea arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-03-21 206 cd1231d7035fea arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-03-21 @207 if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN) && cd1231d7035fea arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-03-21 208 is_kernel_addr(mfspr(SPRN_SDAR))) cd1231d7035fea arch/powerpc/perf/core-book3s.c Madhavan Srinivasan 2018-03-21 209 *addrp = 0; 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 210 } 98fb1807b97e3e arch/powerpc/kernel/perf_counter.c Paul Mackerras 2009-06-17 211 :::::: The code at line 207 was first introduced by commit :::::: cd1231d7035fea894118d5155ff984cdaf1ac1a2 powerpc/perf: Prevent kernel address leak via perf_get_data_addr() :::::: TO: Madhavan Srinivasan <maddy(a)linux.vnet.ibm.com&gt; :::::: CC: Michael Ellerman <mpe(a)ellerman.id.au&gt; --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation