Hi Jeffrey, [FYI, it's a private test report for your RFC patch.] [auto build test WARNING on char-misc/char-misc-testing] [also build test WARNING on arm-soc/for-next linus/master v5.7-rc5 next-20200514] [cannot apply to linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Jeffrey-Hugo/Qualcomm-Cloud-AI-1... base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git 84c1e51d7df85332705ffebc40ef135205492036 config: parisc-allyesconfig (attached as .config) compiler: hppa-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=parisc If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>, old ones prefixed by <<): In file included from include/linux/kernel.h:7, from arch/parisc/include/asm/bug.h:5, from include/linux/bug.h:5, from include/linux/thread_info.h:12, from include/asm-generic/current.h:5, from ./arch/parisc/include/generated/asm/current.h:1, from include/linux/sched.h:12, from include/linux/ratelimit.h:6, from include/linux/dev_printk.h:16, from include/linux/device.h:15, from include/linux/mhi.h:9, from drivers/misc/qaic/mhi_controller.c:6: drivers/misc/qaic/mhi_controller.c: In function 'qaic_mhi_register_controller': 22 | #define U64_MAX ((u64)~0ULL) | ^ 450 | mhi_cntl->iova_stop = U64_MAX - 1; | ^~~~~~~ drivers/misc/qaic/mhi_controller.c:455:10: error: 'struct mhi_controller' has no member named 'link_status' 455 | mhi_cntl->link_status = mhi_link_status; | ^~ vim +/U64_MAX +450 drivers/misc/qaic/mhi_controller.c 428 429 struct mhi_controller *qaic_mhi_register_controller(struct pci_dev *pci_dev, 430 void *mhi_bar, 431 int mhi_irq) 432 { 433 struct mhi_controller *mhi_cntl; 434 int ret; 435 436 pci_dbg(pci_dev, "%s\n", __func__); 437 438 mhi_cntl = kzalloc(sizeof(*mhi_cntl), GFP_KERNEL); 439 if (!mhi_cntl) 440 return ERR_PTR(-ENOMEM); 441 442 mhi_cntl->cntrl_dev = &pci_dev->dev; 443 444 /* 445 * Covers the entire possible physical ram region. Remote side is 446 * going to calculate a size of this range, so subtract 1 to prevent 447 * rollover. 448 */ 449 mhi_cntl->iova_start = 0; 451 452 mhi_cntl->status_cb = mhi_status_cb; 453 mhi_cntl->runtime_get = mhi_runtime_get; 454 mhi_cntl->runtime_put = mhi_runtime_put; 455 mhi_cntl->link_status = mhi_link_status; 456 mhi_cntl->regs = mhi_bar; 457 mhi_cntl->nr_irqs = 1; 458 mhi_cntl->irq = kmalloc(sizeof(*mhi_cntl->irq), GFP_KERNEL); 459 460 if (!mhi_cntl->irq) 461 return ERR_PTR(-ENOMEM); 462 463 mhi_cntl->irq[0] = mhi_irq; 464 465 mhi_cntl->fw_image = "qcom/aic100/sbl.bin"; 466 467 /* use latest configured timeout */ 468 aic100_config.timeout_ms = mhi_timeout; 469 ret = mhi_register_controller(mhi_cntl, &aic100_config); 470 if (ret) { 471 pci_err(pci_dev, "register_mhi_controller failed %d\n", ret); 472 kfree(mhi_cntl->irq); 473 kfree(mhi_cntl); 474 return ERR_PTR(ret); 475 } 476 477 ret = mhi_async_power_up(mhi_cntl); 478 if (ret) { 479 pci_err(pci_dev, "mhi_async_power_up failed %d\n", ret); 480 mhi_unregister_controller(mhi_cntl); 481 kfree(mhi_cntl->irq); 482 kfree(mhi_cntl); 483 return ERR_PTR(ret); 484 } 485 486 return mhi_cntl; 487 } 488 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org