tree: https://github.com/miquelraynal/linux-0day.git perso/nand-next/flags head: c5212e24213cba25bcc57e3bbe0781f3e9d83611 commit: 0a4b5f3a46fade7e1d4cbb1ffc513528cd277d37 [85/102] move skip bbt scan to bbt_options config: h8300-randconfig-r004-20200512 (attached as .config) compiler: h8300-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 0a4b5f3a46fade7e1d4cbb1ffc513528cd277d37 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=h8300 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): drivers/mtd/nand/raw/nand_base.c: In function 'nand_get_bits_per_cell': drivers/mtd/nand/raw/nand_base.c:4654:9: error: implicit declaration of function 'FIELD_GET'; did you mean 'FOLL_GET'? [-Werror=implicit-function-declaration] 4654 | return FIELD_GET(GENMASK(3, 2), cellinfo) + 1; | ^~~~~~~~~ | FOLL_GET drivers/mtd/nand/raw/nand_base.c: In function 'nand_scan_tail': 6014 | if (chip->bbt_options & NAND_BBT_SKIPSCAN) | ^~~~~~~~~~~~~~~~~ | NAND_BBT_SKIP_SCAN drivers/mtd/nand/raw/nand_base.c:6014:26: note: each undeclared identifier is reported only once for each function it appears in cc1: some warnings being treated as errors vim +6014 drivers/mtd/nand/raw/nand_base.c 5699 5700 /** 5701 * nand_scan_tail - Scan for the NAND device 5702 * @chip: NAND chip object 5703 * 5704 * This is the second phase of the normal nand_scan() function. It fills out 5705 * all the uninitialized function pointers with the defaults and scans for a 5706 * bad block table if appropriate. 5707 */ 5708 static int nand_scan_tail(struct nand_chip *chip) 5709 { 5710 struct mtd_info *mtd = nand_to_mtd(chip); 5711 struct nand_ecc_ctrl *ecc = &chip->ecc; 5712 int ret, i; 5713 5714 /* New bad blocks should be marked in OOB, flash-based BBT, or both */ 5715 if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && 5716 !(chip->bbt_options & NAND_BBT_USE_FLASH))) { 5717 return -EINVAL; 5718 } 5719 5720 chip->data_buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); 5721 if (!chip->data_buf) 5722 return -ENOMEM; 5723 5724 /* 5725 * FIXME: some NAND manufacturer drivers expect the first die to be 5726 * selected when manufacturer->init() is called. They should be fixed 5727 * to explictly select the relevant die when interacting with the NAND 5728 * chip. 5729 */ 5730 nand_select_target(chip, 0); 5731 ret = nand_manufacturer_init(chip); 5732 nand_deselect_target(chip); 5733 if (ret) 5734 goto err_free_buf; 5735 5736 /* Set the internal oob buffer location, just after the page data */ 5737 chip->oob_poi = chip->data_buf + mtd->writesize; 5738 5739 /* 5740 * If no default placement scheme is given, select an appropriate one. 5741 */ 5742 if (!mtd->ooblayout && 5743 !(ecc->mode == NAND_ECC_SOFT && ecc->algo == NAND_ECC_BCH)) { 5744 switch (mtd->oobsize) { 5745 case 8: 5746 case 16: 5747 mtd_set_ooblayout(mtd, &nand_ooblayout_sp_ops); 5748 break; 5749 case 64: 5750 case 128: 5751 mtd_set_ooblayout(mtd, &nand_ooblayout_lp_hamming_ops); 5752 break; 5753 default: 5754 /* 5755 * Expose the whole OOB area to users if ECC_NONE 5756 * is passed. We could do that for all kind of 5757 * ->oobsize, but we must keep the old large/small 5758 * page with ECC layout when ->oobsize <= 128 for 5759 * compatibility reasons. 5760 */ 5761 if (ecc->mode == NAND_ECC_NONE) { 5762 mtd_set_ooblayout(mtd, 5763 &nand_ooblayout_lp_ops); 5764 break; 5765 } 5766 5767 WARN(1, "No oob scheme defined for oobsize %d\n", 5768 mtd->oobsize); 5769 ret = -EINVAL; 5770 goto err_nand_manuf_cleanup; 5771 } 5772 } 5773 5774 /* 5775 * Check ECC mode, default to software if 3byte/512byte hardware ECC is 5776 * selected and we have 256 byte pagesize fallback to software ECC 5777 */ 5778 5779 switch (ecc->mode) { 5780 case NAND_ECC_HW_OOB_FIRST: 5781 /* Similar to NAND_ECC_HW, but a separate read_page handle */ 5782 if (!ecc->calculate || !ecc->correct || !ecc->hwctl) { 5783 WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); 5784 ret = -EINVAL; 5785 goto err_nand_manuf_cleanup; 5786 } 5787 if (!ecc->read_page) 5788 ecc->read_page = nand_read_page_hwecc_oob_first; 5789 fallthrough; 5790 case NAND_ECC_HW: 5791 /* Use standard hwecc read page function? */ 5792 if (!ecc->read_page) 5793 ecc->read_page = nand_read_page_hwecc; 5794 if (!ecc->write_page) 5795 ecc->write_page = nand_write_page_hwecc; 5796 if (!ecc->read_page_raw) 5797 ecc->read_page_raw = nand_read_page_raw; 5798 if (!ecc->write_page_raw) 5799 ecc->write_page_raw = nand_write_page_raw; 5800 if (!ecc->read_oob) 5801 ecc->read_oob = nand_read_oob_std; 5802 if (!ecc->write_oob) 5803 ecc->write_oob = nand_write_oob_std; 5804 if (!ecc->read_subpage) 5805 ecc->read_subpage = nand_read_subpage; 5806 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) 5807 ecc->write_subpage = nand_write_subpage_hwecc; 5808 fallthrough; 5809 case NAND_ECC_HW_SYNDROME: 5810 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && 5811 (!ecc->read_page || 5812 ecc->read_page == nand_read_page_hwecc || 5813 !ecc->write_page || 5814 ecc->write_page == nand_write_page_hwecc)) { 5815 WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); 5816 ret = -EINVAL; 5817 goto err_nand_manuf_cleanup; 5818 } 5819 /* Use standard syndrome read/write page function? */ 5820 if (!ecc->read_page) 5821 ecc->read_page = nand_read_page_syndrome; 5822 if (!ecc->write_page) 5823 ecc->write_page = nand_write_page_syndrome; 5824 if (!ecc->read_page_raw) 5825 ecc->read_page_raw = nand_read_page_raw_syndrome; 5826 if (!ecc->write_page_raw) 5827 ecc->write_page_raw = nand_write_page_raw_syndrome; 5828 if (!ecc->read_oob) 5829 ecc->read_oob = nand_read_oob_syndrome; 5830 if (!ecc->write_oob) 5831 ecc->write_oob = nand_write_oob_syndrome; 5832 5833 if (mtd->writesize >= ecc->size) { 5834 if (!ecc->strength) { 5835 WARN(1, "Driver must set ecc.strength when using hardware ECC\n"); 5836 ret = -EINVAL; 5837 goto err_nand_manuf_cleanup; 5838 } 5839 break; 5840 } 5841 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", 5842 ecc->size, mtd->writesize); 5843 ecc->mode = NAND_ECC_SOFT; 5844 ecc->algo = NAND_ECC_HAMMING; 5845 fallthrough; 5846 case NAND_ECC_SOFT: 5847 ret = nand_set_ecc_soft_ops(chip); 5848 if (ret) { 5849 ret = -EINVAL; 5850 goto err_nand_manuf_cleanup; 5851 } 5852 break; 5853 5854 case NAND_ECC_ON_DIE: 5855 if (!ecc->read_page || !ecc->write_page) { 5856 WARN(1, "No ECC functions supplied; on-die ECC not possible\n"); 5857 ret = -EINVAL; 5858 goto err_nand_manuf_cleanup; 5859 } 5860 if (!ecc->read_oob) 5861 ecc->read_oob = nand_read_oob_std; 5862 if (!ecc->write_oob) 5863 ecc->write_oob = nand_write_oob_std; 5864 break; 5865 5866 case NAND_ECC_NONE: 5867 pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n"); 5868 ecc->read_page = nand_read_page_raw; 5869 ecc->write_page = nand_write_page_raw; 5870 ecc->read_oob = nand_read_oob_std; 5871 ecc->read_page_raw = nand_read_page_raw; 5872 ecc->write_page_raw = nand_write_page_raw; 5873 ecc->write_oob = nand_write_oob_std; 5874 ecc->size = mtd->writesize; 5875 ecc->bytes = 0; 5876 ecc->strength = 0; 5877 break; 5878 5879 default: 5880 WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->mode); 5881 ret = -EINVAL; 5882 goto err_nand_manuf_cleanup; 5883 } 5884 5885 if (ecc->correct || ecc->calculate) { 5886 ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL); 5887 ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL); 5888 if (!ecc->calc_buf || !ecc->code_buf) { 5889 ret = -ENOMEM; 5890 goto err_nand_manuf_cleanup; 5891 } 5892 } 5893 5894 /* For many systems, the standard OOB write also works for raw */ 5895 if (!ecc->read_oob_raw) 5896 ecc->read_oob_raw = ecc->read_oob; 5897 if (!ecc->write_oob_raw) 5898 ecc->write_oob_raw = ecc->write_oob; 5899 5900 /* propagate ecc info to mtd_info */ 5901 mtd->ecc_strength = ecc->strength; 5902 mtd->ecc_step_size = ecc->size; 5903 5904 /* 5905 * Set the number of read / write steps for one page depending on ECC 5906 * mode. 5907 */ 5908 ecc->steps = mtd->writesize / ecc->size; 5909 if (ecc->steps * ecc->size != mtd->writesize) { 5910 WARN(1, "Invalid ECC parameters\n"); 5911 ret = -EINVAL; 5912 goto err_nand_manuf_cleanup; 5913 } 5914 ecc->total = ecc->steps * ecc->bytes; 5915 if (ecc->total > mtd->oobsize) { 5916 WARN(1, "Total number of ECC bytes exceeded oobsize\n"); 5917 ret = -EINVAL; 5918 goto err_nand_manuf_cleanup; 5919 } 5920 5921 /* 5922 * The number of bytes available for a client to place data into 5923 * the out of band area. 5924 */ 5925 ret = mtd_ooblayout_count_freebytes(mtd); 5926 if (ret < 0) 5927 ret = 0; 5928 5929 mtd->oobavail = ret; 5930 5931 /* ECC sanity check: warn if it's too weak */ 5932 if (!nand_ecc_strength_good(chip)) 5933 pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%db/%dB)\n", 5934 mtd->name, chip->ecc.strength, chip->ecc.size, 5935 chip->base.eccreq.strength, 5936 chip->base.eccreq.step_size); 5937 5938 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ 5939 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { 5940 switch (ecc->steps) { 5941 case 2: 5942 mtd->subpage_sft = 1; 5943 break; 5944 case 4: 5945 case 8: 5946 case 16: 5947 mtd->subpage_sft = 2; 5948 break; 5949 } 5950 } 5951 chip->subpagesize = mtd->writesize >> mtd->subpage_sft; 5952 5953 /* Invalidate the pagebuffer reference */ 5954 chip->pagecache.page = -1; 5955 5956 /* Large page NAND with SOFT_ECC should support subpage reads */ 5957 switch (ecc->mode) { 5958 case NAND_ECC_SOFT: 5959 if (chip->page_shift > 9) 5960 chip->options |= NAND_SUBPAGE_READ; 5961 break; 5962 5963 default: 5964 break; 5965 } 5966 5967 ret = nanddev_init(&chip->base, &rawnand_ops, mtd->owner); 5968 if (ret) 5969 goto err_nand_manuf_cleanup; 5970 5971 /* Adjust the MTD_CAP_ flags when NAND_ROM is set. */ 5972 if (chip->options & NAND_ROM) 5973 mtd->flags = MTD_CAP_ROM; 5974 5975 /* Fill in remaining MTD driver data */ 5976 mtd->_erase = nand_erase; 5977 mtd->_point = NULL; 5978 mtd->_unpoint = NULL; 5979 mtd->_panic_write = panic_nand_write; 5980 mtd->_read_oob = nand_read_oob; 5981 mtd->_write_oob = nand_write_oob; 5982 mtd->_sync = nand_sync; 5983 mtd->_lock = nand_lock; 5984 mtd->_unlock = nand_unlock; 5985 mtd->_suspend = nand_suspend; 5986 mtd->_resume = nand_resume; 5987 mtd->_reboot = nand_shutdown; 5988 mtd->_block_isreserved = nand_block_isreserved; 5989 mtd->_block_isbad = nand_block_isbad; 5990 mtd->_block_markbad = nand_block_markbad; 5991 mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks; 5992 5993 /* 5994 * Initialize bitflip_threshold to its default prior scan_bbt() call. 5995 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be 5996 * properly set. 5997 */ 5998 if (!mtd->bitflip_threshold) 5999 mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); 6000 6001 /* Initialize the ->data_interface field. */ 6002 ret = nand_init_data_interface(chip); 6003 if (ret) 6004 goto err_nanddev_cleanup; 6005 6006 /* Enter fastest possible mode on all dies. */ 6007 for (i = 0; i < nanddev_ntargets(&chip->base); i++) { 6008 ret = nand_setup_data_interface(chip, i); 6009 if (ret) 6010 goto err_nanddev_cleanup; 6011 } 6012 6013 /* Check, if we should skip the bad block table scan */ 6015 return 0; 6016 6017 /* Build bad block table */ 6018 ret = nand_create_bbt(chip); 6019 if (ret) 6020 goto err_nanddev_cleanup; 6021 6022 return 0; 6023 6024 6025 err_nanddev_cleanup: 6026 nanddev_cleanup(&chip->base); 6027 6028 err_nand_manuf_cleanup: 6029 nand_manufacturer_cleanup(chip); 6030 6031 err_free_buf: 6032 kfree(chip->data_buf); 6033 kfree(ecc->code_buf); 6034 kfree(ecc->calc_buf); 6035 6036 return ret; 6037 } 6038 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org