tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 5e857ce6eae7ca21b2055cca4885545e29228fe2 commit: 6eb3f7da3c332f23d4591063711b2a895ec2ab0f drm/amd/display: fix rn soc bb update date: 7 weeks ago config: i386-randconfig-r024-20200619 (attached as .config) compiler: gcc-9 (Debian 9.3.0-13) 9.3.0 reproduce (this is a W=1 build): git checkout 6eb3f7da3c332f23d4591063711b2a895ec2ab0f # save the attached .config to linux build tree make W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>, old ones prefixed by <<): 177 | static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:165:29: warning: 'NBIF0_BASE' defined but not used [-Wunused-const-variable=] 165 | static const struct IP_BASE NBIF0_BASE ={ { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000 } }, | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:158:29: warning: 'MP1_BASE' defined but not used [-Wunused-const-variable=] 158 | static const struct IP_BASE MP1_BASE ={ { { { 0x00016000, 0x02400400, 0x00E80000, 0x00EC0000, 0x00F00000 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:151:29: warning: 'MP0_BASE' defined but not used [-Wunused-const-variable=] 151 | static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:144:29: warning: 'MMHUB_BASE' defined but not used [-Wunused-const-variable=] 144 | static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0x02408800, 0, 0, 0 } }, | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:137:29: warning: 'L2IMU0_BASE' defined but not used [-Wunused-const-variable=] 137 | static const struct IP_BASE L2IMU0_BASE ={ { { { 0x00007DC0, 0x02407000, 0x00900000, 0x04FC0000, 0x055C0000 } }, | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:130:29: warning: 'ISP_BASE' defined but not used [-Wunused-const-variable=] 130 | static const struct IP_BASE ISP_BASE ={ { { { 0x00018000, 0x0240B000, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:123:29: warning: 'IOHC0_BASE' defined but not used [-Wunused-const-variable=] 123 | static const struct IP_BASE IOHC0_BASE ={ { { { 0x00010000, 0x02406000, 0x04EC0000, 0, 0 } }, | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:116:29: warning: 'HDP_BASE' defined but not used [-Wunused-const-variable=] 116 | static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0x0240A400, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:109:29: warning: 'HDA_BASE' defined but not used [-Wunused-const-variable=] 109 | static const struct IP_BASE HDA_BASE ={ { { { 0x02404800, 0x004C0000, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:102:29: warning: 'GC_BASE' defined but not used [-Wunused-const-variable=] 102 | static const struct IP_BASE GC_BASE ={ { { { 0x00002000, 0x0000A000, 0x02402C00, 0, 0 } }, | ^~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:95:29: warning: 'FUSE_BASE' defined but not used [-Wunused-const-variable=] 95 | static const struct IP_BASE FUSE_BASE ={ { { { 0x00017400, 0x02401400, 0, 0, 0 } }, | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:88:29: warning: 'DPCS_BASE' defined but not used [-Wunused-const-variable=] 88 | static const struct IP_BASE DPCS_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00 } }, | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:81:29: warning: 'DMU_BASE' defined but not used [-Wunused-const-variable=] 81 | static const struct IP_BASE DMU_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:74:29: warning: 'DIO_BASE' defined but not used [-Wunused-const-variable=] 74 | static const struct IP_BASE DIO_BASE ={ { { { 0x02404000, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:67:29: warning: 'DF_BASE' defined but not used [-Wunused-const-variable=] 67 | static const struct IP_BASE DF_BASE ={ { { { 0x00007000, 0x0240B800, 0, 0, 0 } }, | ^~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:60:29: warning: 'DBGU_IO0_BASE' defined but not used [-Wunused-const-variable=] 60 | static const struct IP_BASE DBGU_IO0_BASE ={ { { { 0x000001E0, 0x0240B400, 0, 0, 0 } }, | ^~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:53:29: warning: 'CLK_BASE' defined but not used [-Wunused-const-variable=] 53 | static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x00017E00, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:46:29: warning: 'ATHUB_BASE' defined but not used [-Wunused-const-variable=] 46 | static const struct IP_BASE ATHUB_BASE ={ { { { 0x00000C20, 0x02408C00, 0, 0, 0 } }, | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:39:29: warning: 'ACP_BASE' defined but not used [-Wunused-const-variable=] 39 | static const struct IP_BASE ACP_BASE ={ { { { 0x02403800, 0x00480000, 0, 0, 0 } }, | ^~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:85, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:34: drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dpp.h:50:42: warning: 'dpp_input_csc_matrix' defined but not used [-Wunused-const-variable=] 50 | static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = { | ^~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:34: drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:124:22: warning: 'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=] 124 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa"; | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:122:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=] 122 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:120:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=] 120 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:29: drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=] 76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL }; | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=] 75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL }; | ^~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=] 74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL }; | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=] 73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL }; | ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=] 72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL }; | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=] 67 | static const struct fixed31_32 dc_fixpt_zero = { 0 }; | ^~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c: In function 'update_bw_bounding_box': 1421 | } | ^ vim +1421 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1372 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1373 static void update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1374 { 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1375 struct dcn21_resource_pool *pool = TO_DCN21_RES_POOL(dc->res_pool); 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1376 struct clk_limit_table *clk_table = &bw_params->clk_table; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1377 struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES]; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1378 unsigned int i, j, closest_clk_lvl; a39a58166901f7e Eric Yang 2020-01-20 1379 c42656f8fc52de4 Dmytro Laktyushkin 2020-03-09 1380 // Default clock levels are used for diags, which may lead to overclocking. 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1381 if (!IS_DIAG_DC(dc->ctx->dce_environment)) { 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1382 dcn2_1_ip.max_num_otg = pool->base.res_cap->num_timing_generator; 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1383 dcn2_1_ip.max_num_dpp = pool->base.pipe_count; 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1384 dcn2_1_soc.num_chans = bw_params->num_channels; 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1385 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1386 ASSERT(clk_table->num_entries); 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1387 for (i = 0; i < clk_table->num_entries; i++) { 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1388 /* loop backwards*/ 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1389 for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) { a39a58166901f7e Eric Yang 2020-01-20 1390 if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { a39a58166901f7e Eric Yang 2020-01-20 1391 closest_clk_lvl = j; a39a58166901f7e Eric Yang 2020-01-20 1392 break; a39a58166901f7e Eric Yang 2020-01-20 1393 } a39a58166901f7e Eric Yang 2020-01-20 1394 } a39a58166901f7e Eric Yang 2020-01-20 1395 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1396 clock_limits[i].state = i; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1397 clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1398 clock_limits[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1399 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1400 clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; a39a58166901f7e Eric Yang 2020-01-20 1401 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1402 clock_limits[i].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1403 clock_limits[i].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1404 clock_limits[i].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1405 clock_limits[i].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1406 clock_limits[i].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1407 clock_limits[i].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1408 clock_limits[i].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz; a39a58166901f7e Eric Yang 2020-01-20 1409 } 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1410 for (i = 0; i < clk_table->num_entries; i++) 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1411 dcn2_1_soc.clock_limits[i] = clock_limits[i]; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1412 if (clk_table->num_entries) { 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1413 dcn2_1_soc.num_states = clk_table->num_entries; a39a58166901f7e Eric Yang 2020-01-20 1414 /* duplicate last level */ c42656f8fc52de4 Dmytro Laktyushkin 2020-03-09 1415 dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1]; c42656f8fc52de4 Dmytro Laktyushkin 2020-03-09 1416 dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states; 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1417 } 6eb3f7da3c332f2 Dmytro Laktyushkin 2020-04-22 1418 } 08f6c859211cc0a Sung Lee 2019-12-19 1419 08f6c859211cc0a Sung Lee 2019-12-19 1420 dml_init_instance(&dc->dml, &dcn2_1_soc, &dcn2_1_ip, DML_PROJECT_DCN21); 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 @1421 } 6f4e6361c3ff845 Bhawanpreet Lakha 2019-07-26 1422 :::::: The code at line 1421 was first introduced by commit :::::: 6f4e6361c3ff8457d45d2a898c418e3495e85e93 drm/amd/display: Add Renoir resource (v2) :::::: TO: Bhawanpreet Lakha <Bhawanpreet.Lakha(a)amd.com&gt; :::::: CC: Alex Deucher <alexander.deucher(a)amd.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation 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