Hi Linus, I love your patch! Yet something to improve: [auto build test ERROR on pci/next] [also build test ERROR on soc/for-next linus/master v5.13-rc5 next-20210608] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Linus-Walleij/PCI-ixp4xx-Add-a-n... base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next config: arm-ixp4xx_defconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/83fea9cccbfbf3100a065cdc485d71e62... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Linus-Walleij/PCI-ixp4xx-Add-a-new-driver-for-IXP4xx/20210607-211258 git checkout 83fea9cccbfbf3100a065cdc485d71e623d3f54a # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): drivers/pci/controller/pci-ixp4xx.c:38: warning: "IXP4XX_PCI_CSR" redefined 38 | #define IXP4XX_PCI_CSR 0x1c | In file included from arch/arm/mach-ixp4xx/include/mach/hardware.h:23, from arch/arm/mach-ixp4xx/include/mach/io.h:15, from arch/arm/include/asm/io.h:198, from include/linux/io.h:13, from drivers/pci/controller/pci-ixp4xx.c:20: arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h:220: note: this is the location of the previous definition 220 | #define IXP4XX_PCI_CSR(x) ((volatile u32 *)(IXP4XX_PCI_CFG_BASE_VIRT+(x))) | 148 | static int ixp4xx_pci_read(struct ixp4xx_pci *p, u32 addr, u32 cmd, u32 *data) | ^~~~~~~~~~~~~~~ In file included from arch/arm/include/asm/io.h:198, from include/linux/io.h:13, from drivers/pci/controller/pci-ixp4xx.c:20: arch/arm/mach-ixp4xx/include/mach/io.h:17:14: note: previous declaration of 'ixp4xx_pci_read' was here 17 | extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data); | ^~~~~~~~~~~~~~~ 178 | static int ixp4xx_pci_write(struct ixp4xx_pci *p, u32 addr, u32 cmd, u32 data) | ^~~~~~~~~~~~~~~~ In file included from arch/arm/include/asm/io.h:198, from include/linux/io.h:13, from drivers/pci/controller/pci-ixp4xx.c:20: arch/arm/mach-ixp4xx/include/mach/io.h:18:12: note: previous declaration of 'ixp4xx_pci_write' was here 18 | extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); | ^~~~~~~~~~~~~~~~ vim +/ixp4xx_pci_read +148 drivers/pci/controller/pci-ixp4xx.c 147 149 { 150 int ret; 151 152 ixp4xx_writel(p, IXP4XX_PCI_NP_AD, addr); 153 154 if (p->errata_hammer) { 155 int i; 156 157 /* 158 * PCI workaround - only works if NP PCI space reads have 159 * no side effects. Hammer the register and read twice 8 160 * times. last one will be good. 161 */ 162 for (i = 0; i < 8; i++) { 163 ixp4xx_writel(p, IXP4XX_PCI_NP_CBE, cmd); 164 *data = ixp4xx_readl(p, IXP4XX_PCI_NP_RDATA); 165 *data = ixp4xx_readl(p, IXP4XX_PCI_NP_RDATA); 166 } 167 } else { 168 ixp4xx_writel(p, IXP4XX_PCI_NP_CBE, cmd); 169 *data = ixp4xx_readl(p, IXP4XX_PCI_NP_RDATA); 170 } 171 172 /* Check for master abort */ 173 ret = ixp4xx_pci_check_master_abort(p); 174 175 return ret; 176 } 177 179 { 180 int ret; 181 182 ixp4xx_writel(p, IXP4XX_PCI_NP_AD, addr); 183 184 /* Set up the write */ 185 ixp4xx_writel(p, IXP4XX_PCI_NP_CBE, cmd); 186 187 /* Execute the write by writing to NP_WDATA */ 188 ixp4xx_writel(p, IXP4XX_PCI_NP_WDATA, data); 189 190 /* Check for master abort */ 191 ret = ixp4xx_pci_check_master_abort(p); 192 193 return ret; 194 } 195 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org