tree: https://github.com/0day-ci/linux/commits/UPDATE-20200521-054700/Krzysztof... head: ba7ef1e97861cc12a3504eb041305fc1049d7049 commit: ba7ef1e97861cc12a3504eb041305fc1049d7049 [1/1] PCI: Move from using PCI_BRIDGE_RESOURCES to bridge resource definitions config: x86_64-allyesconfig (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 3393cc4cebf9969db94dc424b7a2b6195589c33b) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu git checkout ba7ef1e97861cc12a3504eb041305fc1049d7049 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>, old ones prefixed by <<): mmio1_res->start = pci_cardbus_mem_size; ^ drivers/pci/setup-bus.c:1190:2: error: use of undeclared identifier 'mmio1_res' mmio1_res->end = b_res->start + b_res_3_size - 1; ^ drivers/pci/setup-bus.c:1191:2: error: use of undeclared identifier 'mmio1_res' mmio1_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; ^ 3 errors generated. vim +/mmio1_res +1189 drivers/pci/setup-bus.c 1108 1109 static void pci_bus_size_cardbus(struct pci_bus *bus, 1110 struct list_head *realloc_head) 1111 { 1112 struct pci_dev *bridge = bus->self; 1113 struct resource *b_res; 1114 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2; 1115 u16 ctrl; 1116 1117 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW]; 1118 if (b_res->parent) 1119 goto handle_b_res_1; 1120 /* 1121 * Reserve some resources for CardBus. We reserve a fixed amount 1122 * of bus space for CardBus bridges. 1123 */ 1124 b_res->start = pci_cardbus_io_size; 1125 b_res->end = b_res->start + pci_cardbus_io_size - 1; 1126 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; 1127 if (realloc_head) { 1128 b_res->end -= pci_cardbus_io_size; 1129 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, 1130 pci_cardbus_io_size); 1131 } 1132 1133 handle_b_res_1: 1134 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW]; 1135 if (b_res->parent) 1136 goto handle_b_res_2; 1137 b_res->start = pci_cardbus_io_size; 1138 b_res->end = b_res->start + pci_cardbus_io_size - 1; 1139 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; 1140 if (realloc_head) { 1141 b_res->end -= pci_cardbus_io_size; 1142 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, 1143 pci_cardbus_io_size); 1144 } 1145 1146 handle_b_res_2: 1147 /* MEM1 must not be pref MMIO */ 1148 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); 1149 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) { 1150 ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; 1151 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); 1152 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); 1153 } 1154 1155 /* Check whether prefetchable memory is supported by this bridge. */ 1156 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); 1157 if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) { 1158 ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; 1159 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); 1160 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); 1161 } 1162 1163 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW]; 1164 if (b_res->parent) 1165 goto handle_b_res_3; 1166 /* 1167 * If we have prefetchable memory support, allocate two regions. 1168 * Otherwise, allocate one region of twice the size. 1169 */ 1170 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { 1171 b_res->start = pci_cardbus_mem_size; 1172 b_res->end = b_res->start + pci_cardbus_mem_size - 1; 1173 b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | 1174 IORESOURCE_STARTALIGN; 1175 if (realloc_head) { 1176 b_res->end -= pci_cardbus_mem_size; 1177 add_to_list(realloc_head, bridge, b_res, 1178 pci_cardbus_mem_size, pci_cardbus_mem_size); 1179 } 1180 1181 /* Reduce that to half */ 1182 b_res_3_size = pci_cardbus_mem_size; 1183 } 1184 1185 handle_b_res_3: 1186 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW]; 1187 if (b_res->parent) 1188 goto handle_done; 1190 mmio1_res->end = b_res->start + b_res_3_size - 1; 1191 mmio1_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; 1192 if (realloc_head) { 1193 b_res->end -= b_res_3_size; 1194 add_to_list(realloc_head, bridge, b_res, b_res_3_size, 1195 pci_cardbus_mem_size); 1196 } 1197 1198 handle_done: 1199 ; 1200 } 1201 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org