Hi Vishal, First bad commit (maybe != root cause): tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.4 head: d128303e4c53bcf7775c46771bf64c71596f3303 commit: 0b197959bbbdb68e1da974bd013339f08704b178 [1296/1762] staging: xlnxsync: Fix the uapi header license config: x86_64-randconfig-s022-20210618 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce: # apt-get install sparse # sparse version: v0.6.3-341-g8af24329-dirty # https://github.com/Xilinx/linux-xlnx/commit/0b197959bbbdb68e1da974bd01333... git remote add xlnx https://github.com/Xilinx/linux-xlnx git fetch --no-tags xlnx xlnx_rebase_v5.4 git checkout 0b197959bbbdb68e1da974bd013339f08704b178 # save the attached .config to linux build tree make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' W=1 ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; sparse warnings: (new ones prefixed by >>) drivers/gpio/gpio-xilinx.c:694:39: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 const [usertype] *p @@ got unsigned int const [usertype] *[assigned] tree_info @@ drivers/gpio/gpio-xilinx.c:694:39: sparse: expected restricted __be32 const [usertype] *p drivers/gpio/gpio-xilinx.c:694:39: sparse: got unsigned int const [usertype] *[assigned] tree_info vim +314 drivers/gpio/gpio-xilinx.c 35b74a9ed928b0 Srinivas Neeli 2020-02-17 285 256f37f6020654 Srinivas Neeli 2020-02-17 286 /** af0c19b6f15388 Michal Simek 2017-09-13 287 * xgpio_irq_mask - Write the specified signal of the GPIO device. 256f37f6020654 Srinivas Neeli 2020-02-17 288 * @irq_data: per irq and chip data passed down to chip functions 256f37f6020654 Srinivas Neeli 2020-02-17 289 */ 256f37f6020654 Srinivas Neeli 2020-02-17 290 static void xgpio_irq_mask(struct irq_data *irq_data) 256f37f6020654 Srinivas Neeli 2020-02-17 291 { 256f37f6020654 Srinivas Neeli 2020-02-17 292 unsigned long flags; 256f37f6020654 Srinivas Neeli 2020-02-17 293 struct xgpio_instance *chip = irq_data_get_irq_chip_data(irq_data); af0c19b6f15388 Michal Simek 2017-09-13 294 struct of_mm_gpio_chip *mm_gc = &chip->mmchip; 256f37f6020654 Srinivas Neeli 2020-02-17 295 u32 offset = irq_data->irq - chip->irq_base; 256f37f6020654 Srinivas Neeli 2020-02-17 296 u32 temp; 256f37f6020654 Srinivas Neeli 2020-02-17 297 256f37f6020654 Srinivas Neeli 2020-02-17 298 pr_debug("%s: Disable %d irq, irq_enable_mask 0x%x\n", 256f37f6020654 Srinivas Neeli 2020-02-17 299 __func__, offset, chip->irq_enable); 256f37f6020654 Srinivas Neeli 2020-02-17 300 af0c19b6f15388 Michal Simek 2017-09-13 301 spin_lock_irqsave(&chip->gpio_lock, flags); 256f37f6020654 Srinivas Neeli 2020-02-17 302 256f37f6020654 Srinivas Neeli 2020-02-17 303 chip->irq_enable &= ~BIT(offset); 256f37f6020654 Srinivas Neeli 2020-02-17 304 256f37f6020654 Srinivas Neeli 2020-02-17 305 if (!chip->irq_enable) { 256f37f6020654 Srinivas Neeli 2020-02-17 306 /* Enable per channel interrupt */ af0c19b6f15388 Michal Simek 2017-09-13 307 temp = xgpio_readreg(mm_gc->regs + XGPIO_IPIER_OFFSET); af0c19b6f15388 Michal Simek 2017-09-13 308 temp &= chip->offset / XGPIO_CHANNEL_OFFSET + 1; af0c19b6f15388 Michal Simek 2017-09-13 309 xgpio_writereg(mm_gc->regs + XGPIO_IPIER_OFFSET, temp); 256f37f6020654 Srinivas Neeli 2020-02-17 310 256f37f6020654 Srinivas Neeli 2020-02-17 311 /* Disable global interrupt if channel interrupts are unused */ af0c19b6f15388 Michal Simek 2017-09-13 312 temp = xgpio_readreg(mm_gc->regs + XGPIO_IPIER_OFFSET); 256f37f6020654 Srinivas Neeli 2020-02-17 313 if (!temp) af0c19b6f15388 Michal Simek 2017-09-13 @314 xgpio_writereg(mm_gc->regs + XGPIO_GIER_OFFSET, 256f37f6020654 Srinivas Neeli 2020-02-17 315 ~XGPIO_GIER_IE); af0c19b6f15388 Michal Simek 2017-09-13 316 256f37f6020654 Srinivas Neeli 2020-02-17 317 } af0c19b6f15388 Michal Simek 2017-09-13 318 spin_unlock_irqrestore(&chip->gpio_lock, flags); 256f37f6020654 Srinivas Neeli 2020-02-17 319 } 256f37f6020654 Srinivas Neeli 2020-02-17 320 :::::: The code at line 314 was first introduced by commit :::::: af0c19b6f15388c554317280433100fd9f3d7d0a gpio: xilinx: Use xilinx tested gpio driver :::::: TO: Michal Simek <michal.simek(a)xilinx.com&gt; :::::: CC: Michal Simek <michal.simek(a)xilinx.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org