tree: https://github.com/nbdd0121/linux asid_v2 head: f0255ecda85bc7e1f7ccf0f315a7d160c88103cf commit: dadefe2159c1a1d30dc1057d5d4d3bef73ea5702 [1/4] riscv: rewrite tlb flush for performance config: riscv-randconfig-r003-20200715 (attached as .config) compiler: riscv32-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout dadefe2159c1a1d30dc1057d5d4d3bef73ea5702 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=riscv If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): arch/riscv/mm/tlbflush.c: In function '__sbi_tlb_flush_range': 18 | unsigned int cpuid; | ^~~~~ vim +/cpuid +18 arch/riscv/mm/tlbflush.c 95594cb40c6e01 Christoph Hellwig 2019-08-21 12 dadefe2159c1a1 Gary Guo 2019-10-04 13 static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start, 95594cb40c6e01 Christoph Hellwig 2019-08-21 14 unsigned long size) 95594cb40c6e01 Christoph Hellwig 2019-08-21 15 { dadefe2159c1a1 Gary Guo 2019-10-04 16 struct cpumask *cmask = mm_cpumask(mm); 95594cb40c6e01 Christoph Hellwig 2019-08-21 17 struct cpumask hmask; 31738ede9b339c Atish Patra 2019-08-22 @18 unsigned int cpuid; 95594cb40c6e01 Christoph Hellwig 2019-08-21 19 6384423f49c804 Atish Patra 2019-08-22 20 if (cpumask_empty(cmask)) 6384423f49c804 Atish Patra 2019-08-22 21 return; 6384423f49c804 Atish Patra 2019-08-22 22 31738ede9b339c Atish Patra 2019-08-22 23 cpuid = get_cpu(); 31738ede9b339c Atish Patra 2019-08-22 24 95594cb40c6e01 Christoph Hellwig 2019-08-21 25 riscv_cpuid_to_hartid_mask(cmask, &hmask); dadefe2159c1a1 Gary Guo 2019-10-04 26 sbi_remote_sfence_vma_asid(cpumask_bits(&hmask), start, size, 0); 31738ede9b339c Atish Patra 2019-08-22 27 31738ede9b339c Atish Patra 2019-08-22 28 put_cpu(); 95594cb40c6e01 Christoph Hellwig 2019-08-21 29 } 95594cb40c6e01 Christoph Hellwig 2019-08-21 30 :::::: The code at line 18 was first introduced by commit :::::: 31738ede9b339c90216b8fd10da0b1567a041f06 RISC-V: Issue a local tlbflush if possible. :::::: TO: Atish Patra <atish.patra(a)wdc.com&gt; :::::: CC: Paul Walmsley <paul.walmsley(a)sifive.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org