tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.10 head: f6f032f82f0a13def702a0154df535db88f43391 commit: 511e872607dba42eccf14b9debfb36d3d9fe1979 [1409/1756] usb: dwc3: gadget: Add hibernation support when operating in gadget mode config: mips-randconfig-r004-20210714 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 8d69635ed9ecf36fd0ca85906bfde17949671cbe) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install mips cross compiling tool for clang build # apt-get install binutils-mips-linux-gnu # https://github.com/Xilinx/linux-xlnx/commit/511e872607dba42eccf14b9debfb3... git remote add xlnx https://github.com/Xilinx/linux-xlnx git fetch --no-tags xlnx xlnx_rebase_v5.10 git checkout 511e872607dba42eccf14b9debfb36d3d9fe1979 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): int dwc3_core_init(struct dwc3 *dwc) ^ drivers/usb/dwc3/core.c:934:1: note: declare 'static' if the function is not intended to be used outside of this translation unit int dwc3_core_init(struct dwc3 *dwc) ^ static 1 warning generated. vim +/dwc3_core_init +934 drivers/usb/dwc3/core.c 927 928 /** 929 * dwc3_core_init - Low-level initialization of DWC3 Core 930 * @dwc: Pointer to our controller context structure 931 * 932 * Returns 0 on success otherwise negative errno. 933 */ 935 { 936 unsigned int hw_mode; 937 u32 reg; 938 int ret; 939 940 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); 941 942 /* 943 * Write Linux Version Code to our GUID register so it's easy to figure 944 * out which kernel version a bug was found. 945 */ 946 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); 947 948 ret = dwc3_phy_setup(dwc); 949 if (ret) 950 goto err0; 951 952 if (!dwc->ulpi_ready) { 953 ret = dwc3_core_ulpi_init(dwc); 954 if (ret) 955 goto err0; 956 dwc->ulpi_ready = true; 957 } 958 959 if (!dwc->phys_ready) { 960 ret = dwc3_core_get_phy(dwc); 961 if (ret) 962 goto err0a; 963 dwc->phys_ready = true; 964 } 965 966 ret = dwc3_core_soft_reset(dwc); 967 if (ret) 968 goto err0a; 969 970 if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD && 971 !DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) { 972 if (!dwc->dis_u3_susphy_quirk) { 973 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); 974 reg |= DWC3_GUSB3PIPECTL_SUSPHY; 975 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); 976 } 977 978 if (!dwc->dis_u2_susphy_quirk) { 979 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 980 reg |= DWC3_GUSB2PHYCFG_SUSPHY; 981 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 982 } 983 } 984 985 dwc3_core_setup_global_control(dwc); 986 dwc3_core_num_eps(dwc); 987 988 ret = dwc3_alloc_scratch_buffers(dwc); 989 if (ret) { 990 dev_err(dwc->dev, 991 "Not enough memory for scratch buffers\n"); 992 goto err1; 993 } 994 995 ret = dwc3_setup_scratch_buffers(dwc); 996 if (ret) 997 goto err1; 998 999 /* Adjust Frame Length */ 1000 dwc3_frame_length_adjustment(dwc); 1001 1002 dwc3_set_incr_burst_type(dwc); 1003 1004 usb_phy_set_suspend(dwc->usb2_phy, 0); 1005 usb_phy_set_suspend(dwc->usb3_phy, 0); 1006 ret = phy_power_on(dwc->usb2_generic_phy); 1007 if (ret < 0) 1008 goto err2; 1009 1010 ret = phy_power_on(dwc->usb3_generic_phy); 1011 if (ret < 0) 1012 goto err3; 1013 1014 ret = dwc3_event_buffers_setup(dwc); 1015 if (ret) { 1016 dev_err(dwc->dev, "failed to setup event buffers\n"); 1017 goto err4; 1018 } 1019 1020 /* 1021 * ENDXFER polling is available on version 3.10a and later of 1022 * the DWC_usb3 controller. It is NOT available in the 1023 * DWC_usb31 controller. 1024 */ 1025 if (DWC3_VER_IS_WITHIN(DWC3, 310A, ANY)) { 1026 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); 1027 reg |= DWC3_GUCTL2_RST_ACTBITLATER; 1028 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 1029 } 1030 1031 if (!DWC3_VER_IS_PRIOR(DWC3, 250A)) { 1032 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 1033 1034 /* 1035 * Enable hardware control of sending remote wakeup 1036 * in HS when the device is in the L1 state. 1037 */ 1038 if (!DWC3_VER_IS_PRIOR(DWC3, 290A)) 1039 reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; 1040 1041 if (dwc->dis_tx_ipgap_linecheck_quirk) 1042 reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; 1043 1044 if (dwc->parkmode_disable_ss_quirk) 1045 reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS; 1046 1047 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1048 } 1049 1050 if (dwc->dr_mode == USB_DR_MODE_HOST || 1051 dwc->dr_mode == USB_DR_MODE_OTG) { 1052 reg = dwc3_readl(dwc->regs, DWC3_GUCTL); 1053 1054 /* 1055 * Enable Auto retry Feature to make the controller operating in 1056 * Host mode on seeing transaction errors(CRC errors or internal 1057 * overrun scenerios) on IN transfers to reply to the device 1058 * with a non-terminating retry ACK (i.e, an ACK transcation 1059 * packet with Retry=1 & Nump != 0) 1060 */ 1061 reg |= DWC3_GUCTL_HSTINAUTORETRY; 1062 1063 dwc3_writel(dwc->regs, DWC3_GUCTL, reg); 1064 } 1065 1066 /* 1067 * Must config both number of packets and max burst settings to enable 1068 * RX and/or TX threshold. 1069 */ 1070 if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { 1071 u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 1072 u8 rx_maxburst = dwc->rx_max_burst_prd; 1073 u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 1074 u8 tx_maxburst = dwc->tx_max_burst_prd; 1075 1076 if (rx_thr_num && rx_maxburst) { 1077 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1078 reg |= DWC31_RXTHRNUMPKTSEL_PRD; 1079 1080 reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 1081 reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 1082 1083 reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 1084 reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 1085 1086 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1087 } 1088 1089 if (tx_thr_num && tx_maxburst) { 1090 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1091 reg |= DWC31_TXTHRNUMPKTSEL_PRD; 1092 1093 reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 1094 reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 1095 1096 reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 1097 reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 1098 1099 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1100 } 1101 } 1102 1103 return 0; 1104 1105 err4: 1106 phy_power_off(dwc->usb3_generic_phy); 1107 1108 err3: 1109 phy_power_off(dwc->usb2_generic_phy); 1110 1111 err2: 1112 usb_phy_set_suspend(dwc->usb2_phy, 1); 1113 usb_phy_set_suspend(dwc->usb3_phy, 1); 1114 1115 err1: 1116 usb_phy_shutdown(dwc->usb2_phy); 1117 usb_phy_shutdown(dwc->usb3_phy); 1118 phy_exit(dwc->usb2_generic_phy); 1119 phy_exit(dwc->usb3_generic_phy); 1120 1121 err0a: 1122 dwc3_ulpi_exit(dwc); 1123 1124 err0: 1125 return ret; 1126 } 1127 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org