Hi Tom,
FYI, the error/warning still remains.
tree:
https://github.com/atishp04/linux dma_non_coherent_test
head: b6a8eeec059715370d35fdb32c8c3fe41e2b69c1
commit: e0d5ab480cafc73def31f4dd297f854bad07dcb8 [6/48] sifive/sifive_l2_cache: Add
sifive_l2_flush64_range function
config: riscv-randconfig-r005-20210615 (attached as .config)
compiler: riscv32-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/atishp04/linux/commit/e0d5ab480cafc73def31f4dd297f854b...
git remote add atishp04
https://github.com/atishp04/linux
git fetch --no-tags atishp04 dma_non_coherent_test
git checkout e0d5ab480cafc73def31f4dd297f854bad07dcb8
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
drivers/soc/sifive/sifive_l2_cache.c: In function 'sifive_l2_flush64_range':
> drivers/soc/sifive/sifive_l2_cache.c:151:3: error: implicit
declaration of function 'writeq'; did you mean 'writeb'?
[-Werror=implicit-function-declaration]
151 | writeq(line, l2_base +
SIFIVE_L2_FLUSH64);
| ^~~~~~
| writeb
cc1: some warnings being treated as errors
Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for LOCKDEP
Depends on DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT && (FRAME_POINTER ||
MIPS || PPC || S390 || MICROBLAZE || ARM || ARC || X86)
Selected by
- LOCK_STAT && DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT
- DEBUG_LOCK_ALLOC && DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT
vim +151 drivers/soc/sifive/sifive_l2_cache.c
122
123 #ifdef CONFIG_SIFIVE_L2_FLUSH
124 void sifive_l2_flush64_range(unsigned long start, unsigned long len)
125 {
126 unsigned long line;
127
128 if(!l2_base) {
129 pr_warn("L2CACHE: base addr invalid, skipping flush\n");
130 return;
131 }
132
133 /* TODO: if (len == 0), skipping flush or going on? */
134 if(!len) {
135 pr_debug("L2CACHE: flush64 range @ 0x%lx(len:0)\n", start);
136 return;
137 }
138
139 /* make sure the address is in the range */
140 if(start < CONFIG_SIFIVE_L2_FLUSH_START ||
141 (start + len) > (CONFIG_SIFIVE_L2_FLUSH_START +
142 CONFIG_SIFIVE_L2_FLUSH_SIZE)) {
143 pr_warn("L2CACHE: flush64 out of range: %lx(%lx), skip flush\n",
144 start, len);
145 return;
146 }
147
148 mb(); /* sync */
149 for (line = start; line < start + len;
150 line += SIFIVE_L2_FLUSH64_LINE_LEN) {
151 writeq(line, l2_base + SIFIVE_L2_FLUSH64);
152 mb();
153 }
154 }
155 EXPORT_SYMBOL_GPL(sifive_l2_flush64_range);
156 #endif
157
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org