tree: https://github.com/intel/tdx.git guest head: 224dd4925275ef73ef78f1412d6f9d03564294eb commit: bf5603172354075b8f75ce3833cb938e729273ca [31/76] x86/tdx: Make DMA pages shared config: i386-randconfig-r032-20210616 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): # https://github.com/intel/tdx/commit/bf5603172354075b8f75ce3833cb938e729273ca git remote add intel-tdx https://github.com/intel/tdx.git git fetch --no-tags intel-tdx guest git checkout bf5603172354075b8f75ce3833cb938e729273ca # save the attached .config to linux build tree make W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): arch/x86/mm/pat/set_memory.c: In function '__set_memory_protect': 1988 | enum tdx_map_type map_type; | ^~~~~~~~ In file included from arch/x86/include/asm/paravirt_types.h:39, from arch/x86/include/asm/ptrace.h:97, from arch/x86/include/asm/math_emu.h:5, from arch/x86/include/asm/processor.h:13, from arch/x86/include/asm/cpufeature.h:5, from arch/x86/include/asm/thread_info.h:53, from include/linux/thread_info.h:59, from arch/x86/include/asm/preempt.h:7, from include/linux/preempt.h:78, from include/linux/spinlock.h:51, from include/linux/wait.h:9, from include/linux/wait_bit.h:8, from include/linux/fs.h:6, from include/linux/highmem.h:5, from arch/x86/mm/pat/set_memory.c:6: arch/x86/include/asm/pgtable.h:27:42: error: implicit declaration of function 'tdg_shared_mask' [-Werror=implicit-function-declaration] 27 | #define pgprot_pg_shared_mask() __pgprot(tdg_shared_mask()) | ^~~~~~~~~~~~~~~ arch/x86/include/asm/pgtable_types.h:177:37: note: in definition of macro '__pgprot' 177 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ^ arch/x86/mm/pat/set_memory.c:2006:20: note: in expansion of macro 'pgprot_pg_shared_mask' 2006 | mem_plain_bits = pgprot_pg_shared_mask(); | ^~~~~~~~~~~~~~~~~~~~~ 2015 | map_type = TDX_MAP_PRIVATE; | ^~~~~~~~~~~~~~~ arch/x86/mm/pat/set_memory.c:2015:14: note: each undeclared identifier is reported only once for each function it appears in 2019 | map_type = TDX_MAP_SHARED; | ^~~~~~~~~~~~~~ 2053 | ret = tdx_hcall_gpa_intent(__pa(addr), numpages, map_type); | ^~~~~~~~~~~~~~~~~~~~ arch/x86/mm/pat/set_memory.c:1988:20: warning: unused variable 'map_type' [-Wunused-variable] 1988 | enum tdx_map_type map_type; | ^~~~~~~~ cc1: some warnings being treated as errors vim +1988 arch/x86/mm/pat/set_memory.c 1983 1984 static int __set_memory_protect(unsigned long addr, int numpages, bool protect) 1985 { 1986 pgprot_t mem_protected_bits, mem_plain_bits; 1987 struct cpa_data cpa; 1989 int ret; 1990 1991 /* Nothing to do if memory encryption is not active */ 1992 if (!mem_encrypt_active() && 1993 !prot_guest_has(PR_GUEST_MEM_ENCRYPT_ACTIVE)) 1994 return 0; 1995 1996 /* Should not be working on unaligned addresses */ 1997 if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr)) 1998 addr &= PAGE_MASK; 1999 2000 memset(&cpa, 0, sizeof(cpa)); 2001 cpa.vaddr = &addr; 2002 cpa.numpages = numpages; 2003 2004 if (prot_guest_has(PR_GUEST_SHARED_MAPPING_INIT)) { 2005 mem_protected_bits = __pgprot(0); 2006 mem_plain_bits = pgprot_pg_shared_mask(); 2007 } else { 2008 mem_protected_bits = __pgprot(_PAGE_ENC); 2009 mem_plain_bits = __pgprot(0); 2010 } 2011 2012 if (protect) { 2013 cpa.mask_set = mem_protected_bits; 2014 cpa.mask_clr = mem_plain_bits; 2016 } else { 2017 cpa.mask_set = mem_plain_bits; 2018 cpa.mask_clr = mem_protected_bits; 2020 } 2021 2022 cpa.pgd = init_mm.pgd; 2023 2024 /* Must avoid aliasing mappings in the highmem code */ 2025 kmap_flush_unused(); 2026 vm_unmap_aliases(); 2027 2028 /* 2029 * Before changing the encryption attribute, we need to flush caches. 2030 * 2031 * For TDX we need to flush caches on private->shared. VMM is 2032 * responsible for flushing on shared->private. 2033 */ 2034 if (prot_guest_has(PR_GUEST_TDX)) { 2035 if (map_type == TDX_MAP_SHARED) 2036 cpa_flush(&cpa, 1); 2037 } else { 2038 cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT)); 2039 } 2040 2041 ret = __change_page_attr_set_clr(&cpa, 1); 2042 2043 /* 2044 * After changing the encryption attribute, we need to flush TLBs again 2045 * in case any speculative TLB caching occurred (but no need to flush 2046 * caches again). We could just use cpa_flush_all(), but in case TLB 2047 * flushing gets optimized in the cpa_flush() path use the same logic 2048 * as above. 2049 */ 2050 cpa_flush(&cpa, 0); 2051 2052 if (!ret && prot_guest_has(PR_GUEST_SHARED_MAPPING_INIT)) 2054 2055 return ret; 2056 } 2057 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org