[GIT PULL] libnvdimm for v5.5
by Dan Williams
Hi Linus, please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm
tags/libnvdimm-for-5.5
...to receive the libnvdimm update for this cycle. The highlight this
cycle is continuing integration fixes for PowerPC and some resulting
optimizations. These commits have appeared in -next with no reported
issues.
---
The following changes since commit d6d5df1db6e9d7f8f76d2911707f7d5877251b02:
Linux 5.4-rc5 (2019-10-27 13:19:19 -0400)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm
tags/libnvdimm-for-5.5
for you to fetch changes up to 0dfbb932bb67dc76646e579ec5cd21a12125a458:
MAINTAINERS: Remove Keith from NVDIMM maintainers (2019-11-25 15:45:08 -0800)
----------------------------------------------------------------
libnvdimm for 5.5
- Updates to better support vmalloc space restrictions on PowerPC platforms.
- Cleanups to move common sysfs attributes to core 'struct device_type'
objects.
- Export the 'target_node' attribute (the effective numa node if pmem is
marked online) for regions and namespaces.
- Miscellaneous fixups and optimizations.
----------------------------------------------------------------
Alastair D'Silva (1):
libnvdimm: Remove prototypes for nonexistent functions
Aneesh Kumar K.V (2):
libnvdimm/pfn_dev: Don't clear device memmap area during generic
namespace probe
libnvdimm/namespace: Differentiate between probe mapping and
runtime mapping
Dan Williams (14):
libnvdimm/pmem: Delete include of nd-core.h
libnvdimm: Move attribute groups to device type
libnvdimm: Move region attribute group definition
libnvdimm: Move nd_device_attribute_group to device_type
libnvdimm: Move nd_numa_attribute_group to device_type
libnvdimm: Move nd_region_attribute_group to device_type
libnvdimm: Move nd_mapping_attribute_group to device_type
libnvdimm: Move nvdimm_attribute_group to device_type
libnvdimm: Move nvdimm_bus_attribute_group to device_type
dax: Create a dax device_type
dax: Simplify root read-only definition for the 'resource' attribute
libnvdimm: Simplify root read-only definition for the 'resource' attribute
dax: Add numa_node to the default device-dax attributes
libnvdimm: Export the target_node attribute for regions and namespaces
Ira Weiny (2):
libnvdimm/namsepace: Don't set claim_class on error
libnvdimm: Trivial comment fix
Keith Busch (1):
MAINTAINERS: Remove Keith from NVDIMM maintainers
Qian Cai (1):
libnvdimm/btt: fix variable 'rc' set but not used
MAINTAINERS | 2 -
arch/powerpc/platforms/pseries/papr_scm.c | 25 +---
drivers/acpi/nfit/core.c | 7 -
drivers/dax/bus.c | 22 ++-
drivers/dax/pmem/core.c | 6 +-
drivers/nvdimm/btt.c | 18 ++-
drivers/nvdimm/btt_devs.c | 24 +--
drivers/nvdimm/bus.c | 44 +++++-
drivers/nvdimm/claim.c | 14 +-
drivers/nvdimm/core.c | 8 +-
drivers/nvdimm/dax_devs.c | 27 ++--
drivers/nvdimm/dimm_devs.c | 30 ++--
drivers/nvdimm/e820.c | 13 --
drivers/nvdimm/namespace_devs.c | 114 +++++++++------
drivers/nvdimm/nd-core.h | 21 ++-
drivers/nvdimm/nd.h | 27 ++--
drivers/nvdimm/of_pmem.c | 13 --
drivers/nvdimm/pfn_devs.c | 64 ++++----
drivers/nvdimm/pmem.c | 18 ++-
drivers/nvdimm/region_devs.c | 235 +++++++++++++++---------------
include/linux/libnvdimm.h | 7 -
include/linux/nd.h | 2 +-
22 files changed, 387 insertions(+), 354 deletions(-)
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Re: DAX filesystem support on ARMv8
by Jon Masters
On 11/14/19 1:54 AM, Bharat Kumar Gogada wrote:
>>
>> On Tue, Nov 12, 2019 at 09:15:18AM -0800, Dan Williams wrote:
>>> On Mon, Nov 11, 2019 at 6:12 PM Bharat Kumar Gogada
>> <bharatku(a)xilinx.com> wrote:
>>>>
>>>> Hi All,
>>>>
>>>> As per Documentation/filesystems/dax.txt
>>>>
>>>> The DAX code does not work correctly on architectures which have
>>>> virtually mapped caches such as ARM, MIPS and SPARC.
>>>>
>>>> Can anyone please shed light on dax filesystem issue w.r.t ARM architecture
>> ?
>>>
>>> The concern is VIVT caches since the kernel will want to flush pmem
>>> addresses with different virtual addresses than what userspace is
>>> using. As far as I know, ARMv8 has VIPT caches, so should not have an
>>> issue. Willy initially wrote those restrictions, but I am assuming
>>> that the concern was managing the caches in the presence of virtual
>>> aliases.
>>
>> The kernel will also access data at different virtual addresses from userspace.
>> So VIVT CPUs will be mmap/read/write incoherent, as well as being flush
>> incoherent.
>
> Thanks a lot Wilcox and Dan for clarification.
> So the above restriction only applies to ARM architectures with VIVT caches and not
> for VIPT caches.
VMSAv8-64 (Armv8) requires that data caches behave as if they were PIPT.
Meaning there is not a situation as described above.
Jon.
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