I agree, I don't think this series should target anything other
using p2p memory located in one of the devices expected to participate
in the p2p trasnaction for a first pass..
I disagree. There is definitely interest in using a NVMe CMB as a bounce buffer and in
deploying systems where only some of the NVMe SSDs below a switch have a CMB but use P2P
to access all of them. Also there are some devices that only expose memory and their
entire purpose is to act as a p2p device, supporting these devices would be valuable.
locality is super important for p2p, so I don't think things
start out in a way that makes specifying the desired locality hard.
Ensuring that the EPs engaged in p2p are all directly connected to the same PCIe switch
ensures locality and (for the switches we have tested) performance. I agree solving the
case where the namespace are CMB are on the same PCIe EP is valuable but I don't see
it as critical to initial acceptance of the series.