1:15 p.m.
Greeting,
There is no primary kpi change in this test, below is the data collected through multiple
monitors running background just for your information.
commit: 70610212c4f312705098319bcc431324abb51aa8 ("sched: cpufreq: enable remote
sched cpufreq callbacks")
https://git.kernel.org/cgit/linux/kernel/git/vireshk/pm.git cpufreq/remote-wakeup
in testcase: fsmark
on test machine: 24 threads Westmere-EP with 16G memory
with following parameters:
iterations: 1x
nr_threads: 32t
disk: 1HDD
fs: xfs
filesize: 16MB
test_size: 60G
sync_method: fsyncBeforeClose
nr_directories: 16d
nr_files_per_directory: 256fpd
test-description: The fsmark is a file system benchmark to test synchronous write
workloads, for example, mail servers workload.
test-url: https://sourceforge.net/projects/fsmark/
Details are as below:
-------------------------------------------------------------------------------------------------->
To reproduce:
git clone git://git.kernel.org/pub/scm/linux/kernel/git/wfg/lkp-tests.git
cd lkp-tests
bin/lkp install job.yaml # job file is attached in this email
bin/lkp run job.yaml
testcase/path_params/tbox_group/run:
fsmark/1x-32t-1HDD-xfs-16MB-60G-fsyncBeforeClose-16d-256fpd/lkp-ws02
2aeda717c2467105 70610212c4f312705098319bcc
---------------- --------------------------
%stddev change %stddev
\ | \
2363063 -3% 2290126 fsmark.time.voluntary_context_switches
15758 -5% 14918 fsmark.time.involuntary_context_switches
388056 35% 522066 interrupts.CAL:Function_call_interrupts
8.97 -31% 6.20 turbostat.%Busy
221 -36% 141 turbostat.Avg_MHz
0.41 78% 0.73 perf-stat.branch-miss-rate%
0.01 66% 0.02 perf-stat.iTLB-load-miss-rate%
0.17 ± 7% 56% 0.26 ± 10% perf-stat.dTLB-load-miss-rate%
47311 9% 51597 perf-stat.cpu-migrations
8.981e+09 6% 9.559e+09 perf-stat.cache-references
1.314e+08 ± 5% 6% 1.396e+08 perf-stat.node-store-misses
1.178e+09 3% 1.215e+09 perf-stat.branch-misses
1.429e+08 1.442e+08 perf-stat.iTLB-load-misses
21.62 21.16 perf-stat.node-load-miss-rate%
0.31 -4% 0.30 perf-stat.ipc
14.29 -4% 13.72 perf-stat.cache-miss-rate%
4.032e+12 -36% 2.578e+12 perf-stat.cpu-cycles
3.135e+11 -38% 1.932e+11 perf-stat.dTLB-loads
1.261e+12 -39% 7.752e+11 ± 3% perf-stat.instructions
8822 -39% 5376 perf-stat.instructions-per-iTLB-miss
1.224e+12 -39% 7.429e+11 perf-stat.iTLB-loads
2.865e+11 -42% 1.66e+11 perf-stat.branch-instructions
fsmark.time.involuntary_context_switches
18000 ++------------------------------------------------------------------+
*. .*. *. .*. .* .*. .* |
16000 O+OO.O.O *.*.O*.*.OO O *.OO.O.* *.**.* **.*.**.* * *.**.* *.*
14000 ++ : OO O O O O O |
| : : |
12000 ++ : : |
10000 ++ : : |
| : : |
8000 ++ : : |
6000 ++ :: |
| :: |
4000 ++ : |
2000 ++ : |
| : |
0 ++-------*----------------------------------------------------------+
perf-stat.cpu-cycles
5e+12 ++----------------------------------------------------------------+
4.5e+12 ++ *. |
*.**. *.* *.**.*.* *.**.*.* .**.*. .* *. |
4e+12 ++ *.* : *.*.* *.* **.* *.**.*.* *.**.*
3.5e+12 ++ : : |
| : : |
3e+12 O+ O O :O O |
2.5e+12 ++OO :O: O O OO OO O OO O O |
2e+12 ++ : : |
| :: |
1.5e+12 ++ :: |
1e+12 ++ :: |
| : |
5e+11 ++ : |
0 ++------*---------------------------------------------------------+
perf-stat.instructions
1.6e+12 ++----------------------------------------------------------------+
| * |
1.4e+12 ++ *. .* .* :+ .* .* .*. *. |
1.2e+12 *+* *.* * *.*.** *.*.* * *.* *.*.** **.*.**.**.*.* *.**.*
| : : |
1e+12 ++ : : |
| O : |
8e+11 O+OO O :O:O OO O OO OO OO O |
| : : O O |
6e+11 ++ :: |
4e+11 ++ :: |
| :: |
2e+11 ++ : |
| : |
0 ++------*---------------------------------------------------------+
perf-stat.branch-instructions
3.5e+11 ++----------------------------------------------------------------+
| .*. *. |
3e+11 *+ .*. .* .**.** * *.**. *. .* .* *.* .*. *. *.|
| ** * * *.* *.* * *.* *.*.* * * *.* *
2.5e+11 ++ : : |
| : : |
2e+11 ++ : : |
O OO O OO:O OO O OO OO O OO O O |
1.5e+11 ++ : : |
| :: |
1e+11 ++ :: |
| :: |
5e+10 ++ : |
| : |
0 ++------*---------------------------------------------------------+
perf-stat.dTLB-loads
3.5e+11 ++---------------------*--*---------------------------------------+
*.* .*. *.* .**.** * *.**.*. *. .**. .* *.* .*. *. *.|
3e+11 ++ * * : *.* * * * *.*.* * * *.* *
| : : |
2.5e+11 ++ : : |
| : : |
2e+11 O+OO O OO:O OO O OO OO O OO O O |
| : : |
1.5e+11 ++ :: |
| :: |
1e+11 ++ :: |
| : |
5e+10 ++ : |
| : |
0 ++------*---------------------------------------------------------+
perf-stat.iTLB-loads
1.4e+12 ++----------------------------------------------------------------+
*. .* .* *.*. *.*.**. .* .*. *. *.|
1.2e+12 ++**.*.* * *.* *.* * *.**.* *.*.**.*.**.** * *.* *
| : : |
1e+12 ++ : : |
| : : |
8e+11 O+OO O OO:O OO O O O |
| : : OO OO OO O |
6e+11 ++ :: |
| :: |
4e+11 ++ :: |
| :: |
2e+11 ++ : |
| : |
0 ++------*---------------------------------------------------------+
perf-stat.cpu-migrations
60000 ++------------------------------------------------------------------+
| |
50000 O+OO O O OO O OO O OO O O OO O O |
*.**.*.* *.*.**.*.**.*.*.**.*.**.*.**.*.*.**.*.**.*.**.*.*.**.*.**.*
| : : |
40000 ++ : : |
| : : |
30000 ++ : : |
| : : |
20000 ++ :: |
| :: |
| :: |
10000 ++ : |
| : |
0 ++-------*----------------------------------------------------------+
perf-stat.branch-miss-rate_
0.8 ++--------------------------------------------------------------------+
| O O O OO O O OO O O O |
0.7 O+O OO O O O |
0.6 ++ |
| |
0.5 ++ |
| .*.* |
0.4 *+*.**.* **.*.*.**.*.*. *. .*.**.*.*.**.*.*.**.* *.*.*.**.*.*.**.*
| : : * * |
0.3 ++ : : |
0.2 ++ : : |
| : : |
0.1 ++ : : |
| : |
0 ++-------*------------------------------------------------------------+
perf-stat.iTLB-load-miss-rate_
0.02 ++----------O----O-OO-O---OO-O--------------------------------------+
0.018 O+OO O O OO OO O O |
| |
0.016 ++ |
0.014 ++ |
| *. .* *. |
0.012 *+* *.* *.*.**.*.**.*.*.**.*.**.* *.*.*.* *.**.*.**.*.*.**.*.**.*
0.01 ++ : : |
0.008 ++ : : |
| : : |
0.006 ++ : : |
0.004 ++ :: |
| : |
0.002 ++ : |
0 ++-------*----------------------------------------------------------+
perf-stat.instructions-per-iTLB-miss
10000 ++-------------------------*---------------------------------*------+
9000 *+**. *.*. .**.*. :+ .**.*.* .*.**. *.*. :+ |
| *.* : **.* *.* * *.* *.* **.*.*.* *.**.*
8000 ++ : : |
7000 ++ : : |
| : : |
6000 O+ O O O: O O O O OO O OO O |
5000 ++O :O: O O O |
4000 ++ :: |
| :: |
3000 ++ :: |
2000 ++ : |
| : |
1000 ++ : |
0 ++-------*----------------------------------------------------------+
turbostat.Avg_MHz
250 ++--------------------------------------------------------------------+
*. *. *. .* .*.**.*.*.**. .* .*. *. .*. .* .*. *.|
| *.* * * *.* *.* *.* * *.* *.*.** * * *.* *
200 ++ : : |
| : : |
| O O O: : O |
150 O+ O :O:OO O OO O O OO O O O |
| : : |
100 ++ : : |
| : : |
| : : |
50 ++ :: |
| : |
| : |
0 ++-------*------------------------------------------------------------+
turbostat._Busy
10 ++-----------------------*--*------------------------------------------+
9 *+ *.* **.*.*.*.**.* * *.*.*. .*.*.* .*.* .*.*. *. .*. .*.|
| *.* : : ** *.* *.* * * ** *
8 ++ : : |
7 ++ : : |
O O OO O:O:OO O O O OO O O OO O O |
6 ++ : : |
5 ++ : : |
4 ++ : : |
| : : |
3 ++ : : |
2 ++ : |
| : |
1 ++ : |
0 ++-------*-------------------------------------------------------------+
[*] bisect-good sample
[O] bisect-bad sample
Disclaimer:
Results have been estimated based on internal Intel analysis and are provided
for informational purposes only. Any difference in system hardware or software
design or configuration may affect actual performance.
Thanks,
Xiaolong