The last time we looked at Verilator it lacked sufficient support for SystemVerilog
interfaces. It looks as though it has improved since then. Despite that, it is unlikely we
will add official support for Verilator. The source for ASE is all in the open source OPAE
SDK, so you could try on your own. The
Makefile<https://github.com/OPAE/opae-sdk/blob/master/ase/Makefile> has all the
simulator-specific rules for compilation and running RTL simulation. The DPI-C code is all
in
ase/sw<https://github.com/OPAE/opae-sdk/tree/master/ase/sw>.
Another unknown is whether the megafunction simulation libraries shipped with Quartus
support Verilator. ASE depends on them.
Do let us know if you try a port and have some success. Sorry we aren’t offering official
support.
-Michael
From: OPAE <opae-bounces(a)lists.01.org> on behalf of Arkadiusz Kudan
<kera.naduk(a)gmail.com>
Date: Thursday, April 11, 2019 at 7:59 AM
To: "opae(a)lists.01.org" <opae(a)lists.01.org>
Subject: [OPAE] Verilator support for ASE
Hi all,
I want to try OPAE with ASE, but i don't have any commercial RTL simulator nor i have
ModelSim compliant machine. Are there any plans to support Verilator or is there any way i
could make it work on my own?
Thanks!