The Apollo Lake EDS is one of the more unique productions when it comes to the register definitions. It looks like the MCHBAR is in Apollo Lake SoC External Design Specification (EDS) Volume 2 of 4 Revision 2.4 (Doc # 557556) chapter 8.1.1. It is offset 0x48. Steve From: Sbl-devel <sbl-devel-bounces(a)lists.01.org&gt; On Behalf Of Kruno Peric Sent: Thursday, May 9, 2019 2:46 PM To: sbl-devel(a)lists.01.org Subject: Re: [Sbl-devel] MCHBAR offset the documents. However, 0x48 is where it is on the core i5. From: Kruno Peric Sent: Thursday, May 9, 2019 4:42 PM To: &#39;sbl-devel(a)lists.01.org&#39; <sbl-devel(a)lists.01.org <mailto:sbl-devel@lists.01.org> > Subject: MCHBAR offset We are trying to locate the MCHBAR offset in the Apollo Lake documentation and cannot find it. We can only find MCHBAR registers offsets, but not the offset of MCHBAR itself in the manuals. If anyone of you know it, or know which document contains it, please share.